Patents by Inventor Bart Markus

Bart Markus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11862459
    Abstract: A semiconductor device having a planar III-N semiconductor layer includes a substrate including a wafer and a buffer layer of a buffer material different from a material of the wafer, the buffer layer having a growth surface, an array of nanostructures epitaxially grown from the growth surface, a continuous planar layer formed by coalescence of upper parts of the nanostructures at an elevated temperature T, where the number of lattice cells spanning a center distance between adjacent nanostructures are different at the growth surface and at the coalesced planar layer, and a growth layer epitaxially grown on the planar layer.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: January 2, 2024
    Assignee: HEXAGEM AB
    Inventors: Jonas Ohlsson, Lars Samuelson, Kristian Storm, Rafal Ciechonski, Bart Markus
  • Publication number: 20220392766
    Abstract: A semiconductor device having a planar III-N semiconductor layer includes a substrate including a wafer and a buffer layer of a buffer material different from a material of the wafer, the buffer layer having a growth surface, an array of nanostructures epitaxially grown from the growth surface, a continuous planar layer formed by coalescence of upper parts of the nanostructures at an elevated temperature T, where the number of lattice cells spanning a center distance between adjacent nanostructures are different at the growth surface and at the coalesced planar layer, and a growth layer epitaxially grown on the planar layer.
    Type: Application
    Filed: June 20, 2022
    Publication date: December 8, 2022
    Inventors: Jonas Ohlsson, Lars Samuelson, Kristian Storm, Rafal Ciechonski, Bart Markus
  • Patent number: 11393686
    Abstract: A semiconductor device having a planar III-N semiconductor layer, comprising a substrate comprising a wafer (101) and a buffer layer (102), of a buffer material different from a material of the wafer, the buffer layer having a growth surface (1021); an array of nano structures (1010) epitaxially grown from the growth surface; a continuous planar layer (1020) formed by coalescence of upper parts of the nano structures at an elevated temperature T, wherein the number of lattice cells spanning a center distance between adjacent nano structures are different at the growth surface and at the coalesced planar layer; a growth layer (1030), epitaxially grown on the planar layer (1020).
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: July 19, 2022
    Assignee: HEXAGEM AB
    Inventors: Jonas Ohlsson, Lars Samuelson, Kristian Storm, Rafal Ciechonski, Bart Markus
  • Publication number: 20200234946
    Abstract: A semiconductor device having a planar III-N semiconductor layer, comprising a substrate comprising a wafer (101) and a buffer layer (102), of a buffer material different from a material of the wafer, the buffer layer having a growth surface (1021); an array of nano structures (1010) epitaxially grown from the growth surface; a continuous planar layer (1020) formed by coalescence of upper parts of the nano structures at an elevated temperature T, wherein the number of lattice cells spanning a center distance between adjacent nano structures are different at the growth surface and at the coalesced planar layer; a growth layer (1030), epitaxially grown on the planar layer (1020).
    Type: Application
    Filed: October 5, 2018
    Publication date: July 23, 2020
    Inventors: Jonas Ohlsson, Lars Samuelson, Kristian Storm, Rafal Ciechonski, Bart Markus