Patents by Inventor Bart Onsia

Bart Onsia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10978601
    Abstract: Example embodiments relate to partially translucent photovoltaic modules and methods for manufacturing partially translucent photovoltaic modules. One embodiment includes a method for electrically interconnecting a plurality of thin-film photovoltaic plates. The method includes positioning a plurality of thin-film photovoltaic plates side by side. The thin-film photovoltaic plates are partially translucent or non-translucent. The method also includes providing at least one connection element on a surface of each of the plurality of thin-film photovoltaic plates. The at least one connection element includes a plurality of electrically conductive wires arranged in a grid structure. Further, the method includes physically separating each connection element into a first connection part that includes a plurality of first electrically interconnected, conductive wires and a second connection part that includes a plurality of second electrically interconnected, conductive wires.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: April 13, 2021
    Assignee: IMEC vzw
    Inventors: Marc Meuris, Tom Borgers, Bart Onsia
  • Publication number: 20200006585
    Abstract: Example embodiments relate to partially translucent photovoltaic modules and methods for manufacturing partially translucent photovoltaic modules. One embodiment includes a method for electrically interconnecting a plurality of thin-film photovoltaic plates. The method includes positioning a plurality of thin-film photovoltaic plates side by side. The thin-film photovoltaic plates are partially translucent or non-translucent. The method also includes providing at least one connection element on a surface of each of the plurality of thin-film photovoltaic plates. The at least one connection element includes a plurality of electrically conductive wires arranged in a grid structure. Further, the method includes physically separating each connection element into a first connection part that includes a plurality of first electrically interconnected, conductive wires and a second connection part that includes a plurality of second electrically interconnected, conductive wires.
    Type: Application
    Filed: February 5, 2018
    Publication date: January 2, 2020
    Inventors: Marc Meuris, Tom Borgers, Bart Onsia
  • Publication number: 20080191286
    Abstract: The present disclosure provides a dual workfunction semiconductor device and a method for manufacturing a dual workfunction semiconductor device. The method comprises providing a device on a first region and a device on a second region of a substrate. According to embodiments described herein, the method includes providing a dielectric layer onto the first and second region of the substrate, the dielectric layer on the first region being integrally deposited with the dielectric layer on the second region, and providing a gate electrode on top of the dielectric layer on both the first and second regions, the gate electrode on the first region being integrally deposited with the gate electrode on the second region.
    Type: Application
    Filed: January 10, 2008
    Publication date: August 14, 2008
    Applicants: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC), TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shou-Zen Chang, Hong Yu Yu, Anabela Veloso, Rita Vos, Stefan Kubicek, Serge Biesemans, Raghunath Singanamalla, Anne Lauwers, Bart Onsia
  • Patent number: 7238291
    Abstract: This invention relates to a method for removing oxides from the surface of a Ge semiconductor substrate comprising the step of subjecting the surface to a Ge oxide etching solution characterized in that the Ge oxide etching solution removes Ge oxides and Ge sub-oxides from the surface.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: July 3, 2007
    Assignee: Interuniversitair Microelektronica Centrum (IMEC)
    Inventors: Bart Onsia, Ivo Teerlinck
  • Publication number: 20050176260
    Abstract: This invention relates to a method for removing oxides from the surface of a Ge semiconductor substrate comprising the step of subjecting the surface to a Ge oxide etching solution characterized in that the Ge oxide etching solution removes Ge oxides and Ge sub-oxides from the surface.
    Type: Application
    Filed: September 17, 2004
    Publication date: August 11, 2005
    Inventors: Bart Onsia, Ivo Teerlinck