Abstract: A method for filling a trench in a substrate includes partially filling the trench with a first silicon dioxide layer. An amorphous silicon layer is deposited on the silicon dioxide layer. The trench is filled with a second silicon dioxide layer. An oxidation treatment is performed on the substrate to oxidize the amorphous silicon layer.

Abstract: Methods and apparatuses for multiple patterning using image reversal are provided. The methods may include depositing gap-fill ashable hardmasks using a deposition-etch-ash method to fill gaps in a pattern of a semiconductor substrate and eliminating spacer etching steps using a single-etch planarization method. Such methods may be performed for double patterning, multiple patterning, and two dimensional patterning techniques in semiconductor fabrication.

Abstract: A method and apparatus for conformally depositing a dielectric oxide in high aspect ratio gaps in a substrate is disclosed. A substrate is provided with one or more gaps into a reaction chamber where each gap has a depth to width aspect ratio of greater than about 5:1. A first dielectric oxide layer is deposited in the one or more gaps by CFD. A portion of the first dielectric oxide layer is etched using a plasma etch, where etching the portion of the first dielectric oxide layer occurs at a faster rate near a top surface than near a bottom surface of each gap so that the first dielectric oxide layer has a tapered profile from the top surface to the bottom surface of each gap. A second dielectric oxide layer is deposited in the one or more gaps over the first dielectric oxide layer via CFD.

Abstract: A method for providing a FinFET device with an air gap spacer includes providing a substrate a plurality of fins and a dummy gate arranged transverse to the plurality of fins; depositing a sacrificial spacer around the dummy gate; depositing a first interlayer dielectric (ILD) layer around the sacrificial spacer; selectively etching the dummy polysilicon gate relative to the first ILD layer and the sacrificial spacer; depositing a replacement metal gate (RMG); etching a portion of the RMG to create a recess surrounded by the sacrificial spacer; and depositing a gate capping layer in the recess. The gate capping layer is at least partially surrounded by the sacrificial spacer and is made of silicon oxycarbide (SiOC).

Abstract: Provided herein are integration-compatible dielectric films and methods of depositing and modifying them. According to various embodiments, the methods can include deposition of flowable dielectric films targeting specific film properties and/or modification of those properties with an integration-compatible treatment process. In certain embodiments, methods of depositing and modifying flowable dielectric films having tunable wet etch rates and other properties are provided. Wet etch rates can be tuned during integration through am integration-compatible treatment process. Examples of treatment processes include plasma exposure and ultraviolet radiation exposure.

Abstract: Provided are methods of filling gaps on a substrate by creating flowable silicon oxide-containing films. The methods involve introducing vapor-phase silicon-containing precursor and oxidant reactants into a reaction chamber containing the substrate under conditions such that a condensed flowable film is formed on the substrate. The flowable film at least partially fills gaps on the substrate. In certain embodiments, the methods involve using a catalyst in the formation of the film. The catalyst may be incorporated into one of the reactants and/or introduced as a separate reactant.

Abstract: A processing system includes a chamber and a steam source that supplies steam in the chamber. A UV source directs UV light onto a deposited layer of a substrate in the presence of the steam from the steam source for a predetermined conversion period to at least partially convert the deposited layer.

Abstract: Described are methods of making silicon nitride (SiN) materials on substrates. Improved SiN films made by the methods are also included. One aspect relates to depositing chlorine (Cl)-free conformal SiN films. In some embodiments, the SiN films are Cl-free and carbon (C)-free. Another aspect relates to methods of tuning the stress and/or wet etch rate of conformal SiN films. Another aspect relates to low-temperature methods of depositing high quality conformal SiN films. In some embodiments, the methods involve using trisilylamine (TSA) as a silicon-containing precursor.

Abstract: Systems and methods for depositing film in a substrate processing system includes performing a first atomic layer deposition (ALD) cycle in a processing chamber to deposit film on a substrate including a feature; after the first ALD cycle, exposing the substrate to an inhibitor plasma in the processing chamber for a predetermined period to create a varying passivated surface in the feature; and after the predetermined period, performing a second ALD cycle in the processing chamber to deposit film on the substrate.

Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by intermittent delivery of dopant species to the film between the cycles of adsorption and reaction.

Abstract: Described are methods of making silicon nitride (SiN) materials on substrates. Improved SiN films made by the methods are also included. One aspect relates to depositing chlorine (Cl)-free conformal SiN films. In some embodiments, the SiN films are Cl-free and carbon (C)-free. Another aspect relates to methods of tuning the stress and/or wet etch rate of conformal SiN films. Another aspect relates to low-temperature methods of depositing high quality conformal SiN films. In some embodiments, the methods involve using trisilylamine (TSA) as a silicon-containing precursor.

Abstract: A semiconductor substrate processing apparatus for processing semiconductor substrates includes showerhead module delivering process gas through a faceplate having gas passages therethrough from the process gas source to a processing zone of the processing apparatus wherein individual semiconductor substrates are processed. The showerhead module comprises a gas delivery conduit in fluid communication with a cavity at a lower end thereof, a baffle arrangement in the gas delivery conduit and the cavity, and a blocker plate in the cavity disposed below the baffle arrangement. The baffle arrangement comprises baffles which divide process gas flowing through the gas delivery conduit into center, inner annular, and outer annular flow streams.

Abstract: Methods of forming a film stack may include the plasma accelerated deposition of a silicon nitride film formed from the reaction of nitrogen containing precursor with silicon containing precursor, the plasma accelerated substantial elimination of silicon containing precursor from the processing chamber, the plasma accelerated deposition of a silicon oxide film atop the silicon nitride film formed from the reaction of silicon containing precursor with oxidant, and the plasma accelerated substantial elimination of oxidant from the processing chamber. Process station apparatuses for forming a film stack of silicon nitride and silicon oxide films may include a processing chamber, one or more gas delivery lines, one or more RF generators, and a system controller having machine-readable media with instructions for operating the one or more gas delivery lines, and the one or more RF generators.

Abstract: Higher overall etch rate and throughput for atomic layer removal (ALR) is achieved. The reaction is a self-limiting process, thus limiting the total amount of material that may be etched per cycle. By pumping down the process station between reacting operations, the reaction is partially “reset.” A higher overall etch rate is achieved by a multiple exposure with pump down ALR process.

Abstract: Disclosed herein are methods of doping a patterned substrate in a reaction chamber. The methods may include forming a first conformal film layer which has a dopant source including a dopant, and driving some of the dopant into the substrate to form a conformal doping profile. In some embodiments, forming the first film layer may include introducing a dopant precursor into the reaction chamber, adsorbing the dopant precursor under conditions whereby it forms an adsorption-limited layer, and reacting the adsorbed dopant precursor to form the dopant source. Also disclosed herein are apparatuses for doping a substrate which may include a reaction chamber, a gas inlet, and a controller having machine readable code including instructions for operating the gas inlet to introduce dopant precursor into the reaction chamber so that it is adsorbed, and instructions for reacting the adsorbed dopant precursor to form a film layer containing a dopant source.

Abstract: Provided herein are integration-compatible dielectric films and methods of depositing and modifying them. According to various embodiments, the methods can include deposition of flowable dielectric films targeting specific film properties and/or modification of those properties with an integration-compatible treatment process. In certain embodiments, methods of depositing and modifying flowable dielectric films having tunable wet etch rates and other properties are provided. Wet etch rates can be tuned during integration through am integration-compatible treatment process. Examples of treatment processes include plasma exposure and ultraviolet radiation exposure.

Abstract: Methods for depositing flowable dielectric films are provided. In some embodiments, the methods involve introducing a silicon-containing precursor to a deposition chamber wherein the precursor is characterized by having a partial pressure:vapor pressure ratio between 0.01 and 1. In some embodiments, the methods involve depositing a high density plasma dielectric film on a flowable dielectric film. The high density plasma dielectric film may fill a gap on a substrate. Also provided are apparatuses for performing the methods.

Abstract: Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about ?600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group consisting of SixByCz, SixByNz, SixByCzNw, BxCy, and BxNy. In some embodiments, a hardmask film includes a germanium-rich GeNx material comprising at least about 60 atomic % of germanium. These hardmasks can be used in a number of back-end and front-end processing schemes in integrated circuit fabrication.

Abstract: Provided herein are integration-compatible dielectric films and methods of depositing and modifying them. According to various embodiments, the methods can include deposition of flowable dielectric films targeting specific film properties and/or modification of those properties with an integration-compatible treatment process. In certain embodiments, methods of depositing and modifying flowable dielectric films having tunable wet etch rates and other properties are provided. Wet etch rates can be tuned during integration through am integration-compatible treatment process. Examples of treatment processes include plasma exposure and ultraviolet radiation exposure.

Abstract: Methods and apparatuses for multiple patterning using image reversal are provided. The methods may include depositing gap-fill ashable hardmasks using a deposition-etch-ash method to fill gaps in a pattern of a semiconductor substrate and eliminating spacer etching steps using a single-etch planarization method. Such methods may be performed for double patterning, multiple patterning, and two dimensional patterning techniques in semiconductor fabrication.