Abstract: Technologies directed to digital active interference cancellation (d-AIC) for full duplex transmit-receive (TX-RX) concurrency. An integrated circuit can include first and second analog front-ends (AFE) and digital front-end (DFE) circuits and a digital AIC circuit that generates a scaled and delayed replica of a first quadrature (IQ) sample corresponding to first data transmitted by the first AFE circuit which is being coupled into the receiver as aggressor. The digital AIC circuit receives a second IQ sample from the second AFE circuit, the second IQ sample corresponding to second data being received by the second AFE circuit. The digital AIC circuit subtracts the scaled and delayed replica of the first IQ sample from the second IQ sample to obtain a third IQ sample and sends the third IQ sample to the second DFE circuit. Third IQ sample is the desired signal when d-AIC cancels the self-interference.

Abstract: Techniques for a communication device with a receiver to dynamically control the gain of an analog front end of the receiver. Rather than having a single circuit path in the analog front end, the analog front end includes multiple circuit paths, and dynamically selects one of the circuit paths that optimizes the gain of the analog front end. For example, an amplifier circuit path may be selected to amplify the power level of the signal received from the antenna. However, the analog front end may further include an attenuator circuit path that includes an attenuator to reduce the power level of a high-power input signal received from the antenna to ensure that the high-power signal is attenuated below a power level associated with saturation of the receiver.