Patents by Inventor Bashirreza KARIMI

Bashirreza KARIMI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250365008
    Abstract: A method for encoding information bits using a zipper code. The zipper is associated with a real buffer for receiving the information bits, a first virtual buffer, a second virtual buffer, and two mapping functions ?1 and ?2. Each row of the real buffer, a corresponding row of the first virtual buffer, and a corresponding row of the second virtual buffer form a codeword of a component code. The two mapping functions ?1 and ?2 are for mapping each group of c bits in each row of the real buffer to c bits in one or more subsequent rows of the first virtual buffer and to c bits in one or more subsequent row of the second virtual buffer, respectively. The c bits in the first virtual buffer are in different rows thereof, and/or the c bits in the second virtual buffer are in different rows thereof.
    Type: Application
    Filed: May 22, 2024
    Publication date: November 27, 2025
    Inventors: Bashirreza Karimi, Yoones Hashemi Toroghi, Hamid Ebrahimzad
  • Publication number: 20250330247
    Abstract: Methods, apparatus, and systems for coded modulation towards data transmissions across optical communication networks are provided. At a network transmitter, sequences of data bits encoded by forward error correction are partitioned and then selectively buffered. Each part of a sequence is mapped to a respective transmission symbol, such that the transmission symbols together represent the whole sequence. Upon receipt of the transmission symbols at a network receiver, two-stage decoding that involves counteractive buffering is used to decode the transmitted symbols. In some embodiments, symbol mapping involves geometric shaping of constellation points by a neural network to maximize generalized mutual information.
    Type: Application
    Filed: April 22, 2024
    Publication date: October 23, 2025
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yoones HASHEMI TOROGHI, Hamid EBRAHIMZAD, Bashirreza KARIMI, Chunpo PAN
  • Patent number: 12101101
    Abstract: Disclosed are systems and methods for transmission and reception of data bits. A plurality of data bits are received. FEC-based encoded data bits are generated in accordance with a zipper code framework incorporating component non-binary codes. The zipper code framework includes a buffer having a virtual buffer and a real buffer. Codewords associated with the FEC-based encoded data bits are stored in rows of the real buffer. A given codeword in a given row of the real buffer is mapped to different rows of the virtual buffer in a quasi-diagonal interleaving manner.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: September 24, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Masoud Barakatain, Hamid Ebrahimzad, Yoones Hashemi Toroghi, Bashirreza Karimi
  • Patent number: 12047170
    Abstract: Forward Error Correction decoding is executed by acquiring a stream of real data symbols from a communication medium, the stream of real data symbols being arranged in a real matrix. Virtual data symbols are generated and arranged in a virtual matrix by applying an interleaver map onto the real matrix. Codewords formed by a main matrix formed by the real matrix and the virtual matrix are iteratively decoded, an iteration of the decoding comprising identifying a set of consecutive received rows of the main matrix, accessing a set of pre-determined reference codewords and in response to determining that a given codeword of the set of consecutive received rows does not match any pre-determined reference codewords, executing a GRAND algorithm on the given codeword, the GRAND algorithm generating a substitute codeword for the given codeword. A system comprising a processor and a memory executes the Forward Error Correction decoding.
    Type: Grant
    Filed: December 16, 2022
    Date of Patent: July 23, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yoones Hashemi Toroghi, Bashirreza Karimi, Hamid Ebrahimzad, Ali Farsiabi
  • Publication number: 20240204913
    Abstract: Forward Error Correction decoding is executed by acquiring a stream of real data symbols from a communication medium, the stream of real data symbols being arranged in a real matrix. Virtual data symbols are generated and arranged in a virtual matrix by applying an interleaver map onto the real matrix. Codewords formed by a main matrix formed by the real matrix and the virtual matrix are iteratively decoded, an iteration of the decoding comprising identifying a set of consecutive received rows of the main matrix, accessing a set of pre-determined reference codewords and in response to determining that a given codeword of the set of consecutive received rows does not match any pre-determined reference codewords, executing a GRAND algorithm on the given codeword, the GRAND algorithm generating a substitute codeword for the given codeword. A system comprising a processor and a memory executes the Forward Error Correction decoding.
    Type: Application
    Filed: December 16, 2022
    Publication date: June 20, 2024
    Inventors: Yoones HASHEMI TOROGHI, Bashirreza KARIMI, Hamid EBRAHIMZAD, Ali FARSIABI
  • Publication number: 20240146332
    Abstract: The disclosed systems and methods for transmission and reception comprising: i) receiving a plurality of data bits; ii) generating FEC-based encoded data bits in accordance with a zipper code framework incorporating component non-binary codes, wherein the zipper code framework including a buffer having a virtual buffer and a real buffer; iii) storing codewords associated with the FEC-based encoded bits in rows of the real buffer; iv) mapping a given codeword in a given row of the real buffer to different rows of the virtual buffer; v) receiving an analog signal transmitted by a transmitter; vi) processing the received analog signal and generating received forward error correction (FEC)-based encoded bits in accordance with a zipper code framework that incorporates component non-binary codes; and vii) decoding the received FEC-based encoded bits in accordance with a non-binary decoding technique and generating information bits.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 2, 2024
    Inventors: Masoud BARAKATAIN, Hamid EBRAHIMZAD, Yoones HASHEMI TOROGHI, Bashirreza KARIMI
  • Patent number: 11968039
    Abstract: There is provided methods and processors for executing Forward Error Correction (FEC) coding. The method includes acquiring a stream of real data symbols from a communication medium. The stream of real data symbols being arranged in a real matrix. The method includes generating virtual data symbols being arranged in a virtual matrix. The generating includes applying an interleaver map onto the matrix such that (i) at most c number of virtual data symbols in a given virtual row of the virtual matrix are copies of (ii) real data symbols associated with a same real row of the real matrix, c being a positive integer higher than 1. The method includes decoding codewords formed by the virtual matrix and the matrix.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: April 23, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Bashirreza Karimi, Masoud Barakatain, Yoones Hashemi Toroghi, Alvin Yonathan Sukmadji, Chunpo Pan
  • Publication number: 20230072039
    Abstract: There is provided methods and processors for executing Forward Error Correction (FEC) coding. The method includes acquiring a stream of real data symbols from a communication medium. The stream of real data symbols being arranged in a real matrix. The method includes generating virtual data symbols being arranged in a virtual matrix. The generating includes applying an interleaver map onto the matrix such that (i) at most c number of virtual data symbols in a given virtual row of the virtual matrix are copies of (ii) real data symbols associated with a same real row of the real matrix, c being a positive integer higher than 1. The method includes decoding codewords formed by the virtual matrix and the matrix.
    Type: Application
    Filed: August 25, 2022
    Publication date: March 9, 2023
    Inventors: Bashirreza KARIMI, Masoud BARAKATAIN, Yoones HASHEMI TOROGHI, Alvin Yonathan SUKMADJI, Chunpo PAN