Abstract: A thermally conductive interposer includes an interposer substrate having a first substrate surface and a second substrate surface. The first substrate surface being configured to be attached to a first device component. The second substrate surface being configured to be attached to a second device component. The interposer substrate being configured to support the second device component on the first device component and integrate the first device component and the second device component within a microelectronic device. Further, the interposer substrate is configured to transfer heat between the first device component and the second device component; and the interposer substrate is configured to be electrically nonconductive.

Abstract: A device includes at least one integrated passive device having at least one bond pad; at least one semiconductor device having at least one bond pad; and at least one connection structure arranged on the at least one integrated passive device. Additionally, the at least one connection structure includes a solder portion configured to form a solder connection to the at least one bond pad of the at least one semiconductor device.

Abstract: A transistor amplifier includes a semiconductor layer structure comprising first and second major surfaces and a plurality of unit cell transistors on the first major surface that are electrically connected in parallel, each unit cell transistor comprising a gate finger coupled to a gate manifold, a drain finger coupled to a drain manifold, and a source finger. The semiconductor layer structure is free of a via to the source fingers on the second major surface.

Abstract: A method of packaging an RF transistor device includes attaching one or more electronic devices to a carrier substrate, applying an encapsulant over at least one of the one or more electronic devices, and providing a protective structure on the carrier substrate over the one or more electronic devices. A packaged RF transistor device includes a carrier substrate, one or more electronic devices attached to the carrier substrate, an encapsulant material over at least one of the one or more electronic devices and extending onto the carrier substrate, and a protective structure on the carrier substrate over the one or more electronic devices and the encapsulant material.

Abstract: RF transistor amplifiers include a Group III nitride-based RF transistor amplifier die that includes a semiconductor layer structure, a conductive source via that is connected to a source region of the Group III nitride-based RF transistor amplifier die, the conductive source via extending through the semiconductor layer structure, and an additional conductive via that extends through the semiconductor layer structure. A first end of the additional conductive via is connected to a first external circuit and a second end of the additional conductive via that is opposite the first end is connected to a first matching circuit.

Abstract: A transistor device includes a substrate and a plurality of transistor unit cells arranged in parallel on the substrate. Each of the transistor unit cells includes a source contact, a drain contact, and a gate finger between the source contact and the drain contact. The gate finger extends in a first direction and has a first end and a second end. The transistor device further includes a first solder bump on the transistor device that is within a periphery of the active region of the device and is electrically connected to the gate finger of a first one of the unit cells at a feed point that is between the first end and the second end of the gate finger.

Abstract: RF transistor amplifiers include an RF transistor amplifier die having a semiconductor layer structure, a coupling element on an upper surface of the semiconductor layer structure, and an interconnect structure on an upper surface of the coupling element so that the RF transistor amplifier die and the interconnect structure are in a stacked arrangement. The coupling element includes a first shielded transmission line structure.

Abstract: RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.

Abstract: In some aspects, a device includes a substrate. A first metallization arranged on the substrate. A second metallization arranged on the substrate. A circuit arranged on the substrate and electrically connected to the first metallization and the second metallization. The first metallization and the second metallization being configured, structured, and arranged to make a solder connection to a device, where the substrate may include silicon carbide (SiC).

Abstract: A semiconductor device package includes a plurality of input leads and an output lead, a plurality of transistor amplifier dies having inputs respectively coupled to the plurality of input leads, and a combination circuit configured to combine output signals received from the plurality of transistor amplifier dies and output a combined signal to the output lead.

Abstract: RF transistor amplifiers include a Group III nitride-based RF transistor amplifier die that includes a semiconductor layer structure, a conductive source via that is connected to a source region of the Group III nitride-based RF transistor amplifier die, the conductive source via extending through the semiconductor layer structure, and an additional conductive via that extends through the semiconductor layer structure. A first end of the additional conductive via is connected to a first external circuit and a second end of the additional conductive via that is opposite the first end is connected to a first matching circuit.

Abstract: A radio frequency (RF) power amplifier device package includes a substrate and a first die attached to the substrate at a bottom surface of the first die. The first die includes top gate or drain contacts on a top surface of the first die opposite the bottom surface. At least one of the top gate or drain contacts is electrically connected to a respective bottom gate or drain contact on the bottom surface of the first die by a respective conductive via structure. An integrated interconnect structure, which is on the first die opposite the substrate, includes a first contact pad on the top gate contact or the top drain contact of the first die, and at least one second contact pad connected to a package lead, a contact of a second die, impedance matching circuitry, and/or harmonic termination circuitry.

Abstract: A radio frequency (RF) power amplifier device package includes a substrate and a first die attached to the substrate at a bottom surface of the first die. The first die includes top gate or drain contacts on a top surface of the first die opposite the bottom surface. At least one of the top gate or drain contacts is electrically connected to a respective bottom gate or drain contact on the bottom surface of the first die by a respective conductive via structure. An integrated interconnect structure, which is on the first die opposite the substrate, includes a first contact pad on the top gate contact or the top drain contact of the first die, and at least one second contact pad connected to a package lead, a contact of a second die, impedance matching circuitry, and/or harmonic termination circuitry.

Abstract: RF transistor amplifiers include a Group III nitride-based RF transistor amplifier die that includes a semiconductor layer structure, a conductive source via that is connected to a source region of the Group III nitride-based RF transistor amplifier die, the conductive source via extending through the semiconductor layer structure, and an additional conductive via that extends through the semiconductor layer structure. A first end of the additional conductive via is connected to a first external circuit and a second end of the additional conductive via that is opposite the first end is connected to a first matching circuit.

Abstract: A transistor device package includes a transistor die comprising a gate terminal, a drain terminal, and a source terminal, and a passive component assembly including the transistor die on a surface thereof and comprising one or more passive electrical components electrically coupled to the gate terminal, the drain terminal, and/or the source terminal. A mold structure may be provided on the one or more passive electrical components. One or more conductive pads may be exposed by the mold structure. A support structure may extend along one or more sides of the transistor die on the surface of the passive component assembly. The support structure may provide a cavity that extends around the transistor die, and/or may be thermally conductive. Related devices and component assemblies are also discussed.

Abstract: RF transistor amplifiers an RF transistor amplifier die having a semiconductor layer structure, an interconnect structure having first and second opposing sides, wherein the first side of the interconnect structure is adjacent a surface of the RF transistor amplifier die such that the interconnect structure and the RF transistor amplifier die are in a stacked arrangement, and one or more circuit elements on the first and/or second side of the interconnect structure.

Abstract: RF amplifiers are provided that include an interconnection structure and a Group III nitride-based RF amplifier die that is mounted on top of the interconnection structure. The Group III nitride-based RF amplifier die includes a semiconductor layer structure. A plurality of unit cell transistors are provided in an upper portion of the semiconductor layer structure, and a gate terminal, a drain terminal and a source terminal are provided on a lower surface of the semiconductor layer structure that is adjacent the interconnection structure.

Abstract: A method of packaging an RF transistor device includes attaching one or more electronic devices to a carrier substrate, applying an encapsulant over at least one of the one or more electronic devices, and providing a protective structure on the carrier substrate over the one or more electronic devices. A packaged RF transistor device includes a carrier substrate, one or more electronic devices attached to the carrier substrate, an encapsulant material over at least one of the one or more electronic devices and extending onto the carrier substrate, and a protective structure on the carrier substrate over the one or more electronic devices and the encapsulant material.

Abstract: An electronic device may be provided with wireless circuitry. The wireless circuitry may include one or more antennas. The antennas may include millimeter wave antenna arrays. Non-millimeter-wave antennas such as cellular telephone antennas may have conductive structures separated by a dielectric gap. In a device with a metal housing, a plastic-filled slot may form the dielectric gap. The conductive structures may be slot antenna structures, inverted-F antenna structures such as an inverted-F antenna resonating element and a ground, or other antenna structures. The plastic-filled slot may serve as a millimeter wave antenna window. A millimeter wave antenna array may be mounted in alignment with the millimeter wave antenna window to transmit and receive signals through the window. Millimeter wave antenna windows may also be formed from air-filled openings in a metal housing such as audio port openings.

Abstract: A transistor device package includes a component assembly comprising an interconnect structure, a transistor die having a front surface including gate, drain, and source terminal on a first surface of the interconnect structure, and one or more passive electrical components electrically coupled to the gate, drain, and/or source terminal by the interconnect structure. A thermally conductive flange is attached to a back surface of the transistor die, which is opposite the front surface, by a conductive adhesive. Respective patterns of the conductive adhesive are provided on the first surface of the interconnect structure, and least one of the respective patterns of the conductive adhesive provides an input, output, or ground signal path for the transistor device package. Related fabrication methods are also discussed.