Patents by Inventor Bassam Ziadeh

Bassam Ziadeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210233867
    Abstract: Embodiments herein describe techniques for an IC package including a supporting layer having a first zone and a second zone. An electronic component is placed above the first zone of the supporting layer. An underfill material is formed above the first zone of the supporting layer, around or below the electronic component to support the electronic component. The second zone of the supporting layer includes a base area and multiple micro-pillars above the base area, where any two micro-pillars of the multiple micro-pillars are separated by a gap in between. The second zone has a hydrophobic surface including surfaces of the multiple micro-pillars and surfaces of the base area. The second zone is a keep out zone to prevent the underfill material from entering the second zone. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: January 24, 2020
    Publication date: July 29, 2021
    Inventors: Bassam ZIADEH, Joseph VAN NAUSDLE, Zhou YANG, William J. LAMBERT, Mitul MODI
  • Publication number: 20200395234
    Abstract: A transport carrier assembly for transporting integrated circuit dice may be formed comprising a rigid carrier frame and a compliant carrier insert attached within the rigid carrier frame. In one embodiment, the rigid carrier frame may conform to a standard, such that processing equipment may uniformly handle and transport the transport carrier assembly, and the compliant carrier insert may have differing configurations to house corresponding integrated circuit die configurations. In a further embodiment, the rigid carrier frame may comprise a substantially non-resilient material to provide structural integrity and the compliant carrier insert may comprise a substantially resilient material to protect the integrated circuit dice disposed therein during shipping and processing events.
    Type: Application
    Filed: June 12, 2019
    Publication date: December 17, 2020
    Inventor: Bassam Ziadeh
  • Patent number: 10580758
    Abstract: Embodiments of the present disclosure describe scalable package architecture of an integrated circuit (IC) assembly and associated techniques and configurations.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: March 3, 2020
    Assignee: INTEL CORPORATION
    Inventors: Sanka Ganesan, Bassam Ziadeh, Nitesh Nimkar
  • Patent number: 10483177
    Abstract: A carrier medium for a semiconductor die includes a carrier tape with at least one pocket for the die to sit in and a selectively applied non-activated adhesive on the carrier tape.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: November 19, 2019
    Assignee: Intel Corporation
    Inventors: Bassam Ziadeh, John Lofgren, Santosh Pabba, Kevin Pounds, Alin Ila
  • Publication number: 20190006251
    Abstract: A carrier medium for a semiconductor die includes a carrier tape with at least one pocket for the die to sit in and a selectively applied non-activated adhesive on the carrier tape.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 3, 2019
    Inventors: Bassam Ziadeh, John Lofgren, Santosh Pabba, Kevin Pounds, Alin Ila
  • Publication number: 20180331075
    Abstract: Embodiments of the present disclosure describe scalable package architecture of an integrated circuit (IC) assembly and associated techniques and configurations.
    Type: Application
    Filed: July 24, 2018
    Publication date: November 15, 2018
    Inventors: Sanka Ganesan, Bassam Ziadeh, Nitesh Nimkar
  • Patent number: 10037976
    Abstract: Embodiments of the present disclosure describe scalable package architecture of an integrated circuit (IC) assembly and associated techniques and configurations.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: July 31, 2018
    Assignee: INTEL CORPORATION
    Inventors: Sanka Ganesan, Bassam Ziadeh, Nitesh Nimkar
  • Publication number: 20180005997
    Abstract: Embodiments of the present disclosure describe scalable package architecture of an integrated circuit (IC) assembly and associated techniques and configurations.
    Type: Application
    Filed: September 14, 2017
    Publication date: January 4, 2018
    Inventors: Sanka Ganesan, Bassam Ziadeh, Nitesh Nimkar
  • Patent number: 9793244
    Abstract: Embodiments of the present disclosure describe scalable package architecture of an integrated circuit (IC) assembly and associated techniques and configurations.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: October 17, 2017
    Assignee: Intel Corporation
    Inventors: Sanka Ganesan, Bassam Ziadeh, Nitesh Nimkar
  • Publication number: 20160260690
    Abstract: Embodiments of the present disclosure describe scalable package architecture of an integrated circuit (IC) assembly and associated techniques and configurations.
    Type: Application
    Filed: July 11, 2014
    Publication date: September 8, 2016
    Inventors: Sanka Ganesan, Bassam Ziadeh, Nitesh Nimkar