Patents by Inventor Bayram Yenikaya

Bayram Yenikaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230125680
    Abstract: Disclosed is an operating method of an electronic device for manufacture of a semiconductor device. The operating method includes receiving a layout image of the semiconductor device, generating an intermediate image by generating assist features based on main features of the layout image, evaluating a process result by performing simulation based on the intermediate image, and correcting the intermediate image by correcting shapes of the main features and/or the assist features of the intermediate image based on the process result.
    Type: Application
    Filed: October 26, 2021
    Publication date: April 27, 2023
    Inventors: USEONG KIM, Bayram YENIKAYA, Mindy LEE, Xin ZHOU, HEE-JUN LEE, WOO-YONG CHO
  • Patent number: 10310372
    Abstract: According to certain aspects, the present embodiments relate to an inverse lithography technology (ILT) solution that provides masks with perfect symmetry and minimal complexity. A methodology according to the embodiments includes several steps and strictly maintains symmetry in each of these steps. In one step, lithographic model kernels are processed to enforce symmetry corresponding to an illumination source. In another step, an ideal grayscale mask for a target pattern is computed using the symmetrical model kernels and computation domain centered on each target polygon. In another step optimized polygons are computed using the computed grayscale mask. The final mask perfectly maintains the symmetry properties of the illumination source. An ILT solution according to the embodiments can be used on an original design hierarchy and on a full chip scale.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: June 4, 2019
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventor: Bayram Yenikaya
  • Patent number: 8122389
    Abstract: An apparatus and method for modifying a mask data set includes calculating a derivative of a figure-of-merit, indicative of a data set defined by a plurality of polygon edges and then segmenting polygon edges in response to said step of calculating.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: February 21, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventors: Abdurrahman Sezginer, Bayram Yenikaya, Hsu-Ting Huang
  • Patent number: 7913197
    Abstract: According to various embodiments of the invention systems and methods for multiple pattern lithography, wherein a target layout pattern that is not capable of being printed in one lithography step is decomposed into multiple patterns that are printable in one lithography operation and, when appropriate, a continuous junction is utilized for where patterns overlap. In a further embodiment, where a continuous junction is not utilized, a splice is utilized at overlap locations. In yet another embodiment, where splices are utilized for overlap locations, identifying where critical nets are located in the target layout pattern, determining how close a component of the critical net is to a splice, and changing the target layout pattern as to avoid the condition of a component of the critical net being in proximity to a splice. In another embodiment of the invention, where splices are utilized at overlap locations, placing a landing pad of contacts or vias at the same location as the splice.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: March 22, 2011
    Assignee: Cadence Design Systems, Inc.
    Inventors: Michiel Victor Paul Kruger, Bayram Yenikaya, Anwei Liu, Abdurrahman Sezginer, Wolf Staud
  • Patent number: 7849423
    Abstract: A photomask dataset corresponding to a target-pattern is verified by simulating a resist-pattern that will be formed in a resist layer by a lithography process, simulating an etched-pattern that will be etched in a layer by a plasma process wherein said simulation comprises calculating a flux of particles impacting a feature, and determining whether the etched-pattern substantially conforms to the target-pattern.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: December 7, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Bayram Yenikaya, Devendra Joshi, Paul A. Fornari, Jesus O. Carrero, Abdurrahman Sezginer
  • Publication number: 20100186000
    Abstract: An apparatus and method for modifying a mask data set includes calculating a derivative of a figure-of-merit, indicative of a data set defined by a plurality of polygon edges and then segmenting polygon edges in response to said step of calculating.
    Type: Application
    Filed: January 20, 2010
    Publication date: July 22, 2010
    Inventors: ABDURRAHMAN SEZGINER, Bayram Yenikaya, Hsu-Ting Huang
  • Patent number: 7743358
    Abstract: An apparatus and method for modifying a mask data set includes calculating a derivative of a figure-of-merit, indicative of a data set defined by a plurality of polygon edges and then segmenting polygon edges in response to said step of calculating.
    Type: Grant
    Filed: August 13, 2005
    Date of Patent: June 22, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Abdurrahman Sezginer, Bayram Yenikaya, Hsu-Ting Huang
  • Patent number: 7600212
    Abstract: A method for synthesizing a photomask data set from a given target layout, including the following steps: (a) providing a set of target polygons for the target layout; (b) fitting a smooth curve to a target polygon of the set of target polygons, the curve having a set of etch-target points; (c) moving the etch target points according to a model of an etch process to produce a set of lithography-target points; and (d) synthesizing a photomask data set based on a model of a lithography process and the set of lithography-target points.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: October 6, 2009
    Assignee: Cadence Design Systems, Inc.
    Inventors: Franz X. Zach, Jesus Carrero, Bayram Yenikaya, Gokhan Percin, Xuelong Cao, Abdurrahman Sezginer
  • Patent number: 7568174
    Abstract: A technique for determining, without having to perform optical proximity correction, when the result of optical proximity correction will fail to meet the design requirements for printability. A disclosed embodiment has application to a process for producing a photomask for use in the printing of a pattern on a wafer by exposure with optical radiation to optically image the photomask on the wafer. A method is set forth for checking the printability of a target layout proposed for defining the photomask, including the following steps: deriving a system of inequalities that expresses a set of design requirements with respect to the target layout; and checking the printability of the target layout by determining whether the system of inequalities is feasible.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: July 28, 2009
    Assignee: Cadence Design Systems, Inc.
    Inventors: Abdurrahman Sezginer, Bayram Yenikaya
  • Publication number: 20070143733
    Abstract: A method for synthesizing a photomask data set from a given target layout, including the following steps: (a) providing a set of target polygons for the target layout; (b) fitting a smooth curve to a target polygon of the set of target polygons, the curve having a set of etch-target points; (c) moving the etch target points according to a model of an etch process to produce a set of lithography-target points; and (d) synthesizing a photomask data set based on a model of a lithography process and the set of lithography-target points.
    Type: Application
    Filed: October 2, 2006
    Publication date: June 21, 2007
    Inventors: Franz Zach, Jesus Carrero, Bayram Yenikaya, Gokhan Percin, Xuelong Cao, Abdurrahman Sezginer
  • Publication number: 20070094634
    Abstract: A technique for determining, without having to perform optical proximity correction, when the result of optical proximity correction will fail to meet the design requirements for printability. A disclosed embodiment has application to a process for producing a photomask for use in the printing of a pattern on a wafer by exposure with optical radiation to optically image the photomask on the wafer. A method is set forth for checking the printability of a target layout proposed for defining the photomask, including the following steps: deriving a system of inequalities that expresses a set of design requirements with respect to the target layout; and checking the printability of the target layout by determining whether the system of inequalities is feasible.
    Type: Application
    Filed: August 16, 2006
    Publication date: April 26, 2007
    Inventors: Abdurrahman Seizginer, Bayram Yenikaya
  • Publication number: 20060248496
    Abstract: An apparatus and method for modifying a mask data set includes calculating a derivative of a figure-of-merit, indicative of a data set defined by a plurality of polygon edges and then segmenting polygon edges in response to said step of calculating.
    Type: Application
    Filed: August 13, 2005
    Publication date: November 2, 2006
    Inventors: Abdurrahman Sezginer, Bayram Yenikaya, Hsu-Ting Huang