Patents by Inventor Beate Weissnicht

Beate Weissnicht has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9847395
    Abstract: A semiconductor device includes a gate structure that extends from a first surface into a semiconductor portion and that surrounds a transistor section of the semiconductor portion. A field plate structure includes a field electrode and extends from the first surface into the transistor section. A mesa section of the semiconductor portion separates the field plate structure and the gate structure. A contact structure includes a first portion directly adjoining the mesa section and a second portion directly adjoining the field electrode. The first and second portions include stripes and are directly connected to each other.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: December 19, 2017
    Assignee: Infineon Technologies Austria AG
    Inventors: David Laforet, Elisabeth Schwarz, Beate Weissnicht
  • Publication number: 20170170282
    Abstract: In an embodiment, a method includes forming an adhesion promotion layer on at least portions of a conductive surface arranged on a Group III nitride-based semiconductor layer, applying a resist layer to the adhesion promotion layer such that regions of the conductive surface are uncovered by the adhesion promotion layer and the resist layer, applying by electroplating a conductive layer to the regions of the conductive surface uncovered by the adhesion promotion layer and the resist layer, and removing the resist layer and removing the adhesion promotion layer.
    Type: Application
    Filed: December 15, 2015
    Publication date: June 15, 2017
    Inventors: Arno Zechmann, Annette Saenger, Ulrike Fastner, Beate Weissnicht, Stefan Krivec
  • Patent number: 9660037
    Abstract: In an embodiment, a method includes forming an adhesion promotion layer on at least portions of a conductive surface arranged on a Group III nitride-based semiconductor layer, applying a resist layer to the adhesion promotion layer such that regions of the conductive surface are uncovered by the adhesion promotion layer and the resist layer, applying by electroplating a conductive layer to the regions of the conductive surface uncovered by the adhesion promotion layer and the resist layer, and removing the resist layer and removing the adhesion promotion layer.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: May 23, 2017
    Assignee: Infineon Technologies Austria AG
    Inventors: Arno Zechmann, Annette Sanger, Ulrike Fastner, Beate Weissnicht, Stefan Krivec
  • Publication number: 20170005171
    Abstract: A semiconductor device includes a gate structure that extends from a first surface into a semiconductor portion and that surrounds a transistor section of the semiconductor portion. A field plate structure includes a field electrode and extends from the first surface into the transistor section. A mesa section of the semiconductor portion separates the field plate structure and the gate structure. A contact structure includes a first portion directly adjoining the mesa section and a second portion directly adjoining the field electrode. The first and second portions include stripes and are directly connected to each other.
    Type: Application
    Filed: July 1, 2016
    Publication date: January 5, 2017
    Inventors: David Laforet, Elisabeth Schwarz, Beate Weissnicht