Patents by Inventor Bee Bee Teo

Bee Bee Teo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250201740
    Abstract: Electroless deposition processes for semiconductor device fabrication are provided. In one example, a method for electroless deposition of a metal layer on a wide bandgap semiconductor device includes providing a semiconductor wafer having one or more wide bandgap semiconductor devices. The method includes performing an activation layer deposition process on at least a portion of the semiconductor wafer to deposit an activation layer. At least a portion of the activation layer deposition process comprises an activation layer etchant process. The method includes depositing one or more metal layers on the activation layer using an electroless deposition process. Conducting the activation layer etchant process includes providing the semiconductor wafer in an etchant bath for a first process period; removing the semiconductor wafer from the etchant bath; and after removing the semiconductor wafer from the etchant bath, providing the semiconductor wafer in the etchant bath for a second process period.
    Type: Application
    Filed: December 19, 2023
    Publication date: June 19, 2025
    Inventors: Meagan Lenore Coleman, Upendra Milind Phatak, Chris Cook, Robert Justin Morgan, John Adam Wangelin, Bee Bee Teo
  • Publication number: 20250201565
    Abstract: Electroless deposition processes for semiconductor device fabrication are provided. In one example, a method for electroless deposition of a metal layer on a wide bandgap semiconductor device includes providing a semiconductor wafer having one or more wide bandgap semiconductor devices. The method includes performing an activation layer deposition process on at least a portion of the semiconductor wafer to deposit an activation layer. At least a portion of the activation layer deposition process comprises an activation layer etchant process. The method includes depositing one or more metal layers on the activation layer using an electroless deposition process. Conducting the activation layer etchant process includes providing the semiconductor wafer in an etchant bath for a first process period; removing the semiconductor wafer from the etchant bath; and after removing the semiconductor wafer from the etchant bath, providing the semiconductor wafer in the etchant bath for a second process period.
    Type: Application
    Filed: January 11, 2024
    Publication date: June 19, 2025
    Inventors: Meagan Lenore Coleman, Upendra Milind Phatak, Chris Cook, Robert Justin Morgan, John Adam Wangelin, Bee Bee Teo, Allison Lee Norris