Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.

Abstract: A processor-implemented object detection method is provided. The method receives an input image, generates a latent variable that indicates a feature distribution of the input image, and detects an object in the input image based on the generated latent variable.

Abstract: A processor-implemented object detection method is provided. The method receives an input image, generates a latent variable that indicates a feature distribution of the input image, and detects an object in the input image based on the generated latent variable.

Abstract: A method performed on a user interface device is described. The method includes connecting to a smart card where the smart card is connected to an electronic system to be de-bugged. The method also includes causing a cloud service to download customized test vectors for the electronic system to the smart card. The method also includes causing the smart card to begin execution of test software and/or operation of programmable hardware logic circuitry that uses the customized test vectors to test the electronic system.

Abstract: A method of updating execution instructions of a multi-core processor comprising receiving execution instructions at a processor including multiple programmable processing cores integrated on a single die, selecting subset of at least one of the cores, and loading at least a portion of the execution instructions to the subset of cores and replacing existing execution instructions, associated with the first subset of programmable processing cores, with the received execution instructions while at least one of the other cores continues to process received packets, wherein a sequence of threads provided by the cores sequentially retrieve packets to process from at least one queue, the sequence proceeding from a subsequence of at least one thread of one core to a subsequence of at least one thread on another core and wherein the sequence of threads is specified by data identifying, at least, the next core in the sequence.

Abstract: A measuring receiver comprises a spectrum analyzer having a local oscillator for sweeping the measurement frequency of the spectrum analyzer through multiple frequency bands. A preselector has multiple filter paths with frequency bands corresponding to frequency bands of the spectrum analyzer. The filter paths for passing signals through the preselector and outputting filtered signals to the spectrum analyzer. Switches of the preselector switch between filter paths to switch in a filter path having a frequency band corresponding to a frequency band being swept by the spectrum analyzer. A controller delays the sweeping of the measurement frequency during intervals when the switches are switching between filter paths.