Patents by Inventor Beeman Noel Fallwell

Beeman Noel Fallwell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Pass through circuit for reduced memory latency in a multiprocessor system
    Patent number: 7007125
    Abstract: A technique and mechanism for reducing memory latency asymmetry in a multiprocessor system by replacing one (or more) processors with a bypass or pass-through device. Using the pass-through mechanism, the reduced number of processors in the system enables all of the remaining processors to connect to each other directly using the interconnect links. The reduction in processor count improves symmetry and reduces overall latency thereby potentially improving performance of certain applications despite having fewer processors. In one specific implementation, the pass through device is used to connect two HyperTransport links together where each of the links is connected to a processor at the other end.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: February 28, 2006
    Assignee: International Business Machines Corporation
    Inventors: John Howard Barker, Beeman Noel Fallwell, Jr.
  • Pass through circuit for reduced memory latency in a multiprocessor system
    Publication number: 20040268000
    Abstract: A technique and mechanism for reducing memory latency asymmetry in a multiprocessor system by replacing one (or more) processors with a bypass or pass-through device. Using the pass-through mechanism, the reduced number of processors in the system enables all of the remaining processors to connect to each other directly using the interconnect links. The reduction in processor count improves symmetry and reduces overall latency thereby potentially improving performance of certain applications despite having fewer processors. In one specific implementation, the pass through device is used to connect two HyperTransport links together where each of the links is connected to a processor at the other end.
    Type: Application
    Filed: June 24, 2003
    Publication date: December 30, 2004
    Inventors: John Howard Barker, Beeman Noel Fallwell