Abstract: Apparatus, methods, and programs for protecting data on a wireless device may include a wireless device having a computer platform with a processing engine operable, based upon configurable parameters, to log data access attempt on the wireless device and transmit the log to a remote device. Furthermore, the wireless device may be configured to execute locally and remotely generated control commands on the wireless device, the commands operable to modify an operation of the wireless device. The embodiment may also include an apparatus operable to receive the transmitted log, analyze the received log and transmit a control command to the wireless device. The apparatus may further generate a data access report and make the report available to an authorized user.

Abstract: Apparatus, methods, and programs for protecting data on a wireless device may include a wireless device having a computer platform with a processing engine operable, based upon configurable parameters, to log data access attempt on the wireless device and transmit the log to a remote device. Furthermore, the wireless device may be configured to execute locally and remotely generated control commands on the wireless device, the commands operable to modify an operation of the wireless device. The embodiment may also include an apparatus operable to receive the transmitted log, analyze the received log and transmit a control command to the wireless device. The apparatus may further generate a data access report and make the report available to an authorized user.

Abstract: Apparatus, methods, and programs for protecting data on a wireless device may include a wireless device having a computer platform with a processing engine operable, based upon configurable parameters, to log data access attempt on the wireless device and transmit the log to a remote device. Furthermore, the wireless device may be configured to execute locally and remotely generated control commands on the wireless device, the commands operable to modify an operation of the wireless device. The embodiment may also include an apparatus operable to receive the transmitted log, analyze the received log and transmit a control command to the wireless device. The apparatus may further generate a data access report and make the report available to an authorized user.

Abstract: Apparatus, methods, processors and machine readable media for verifying the integrity of firmware on a wireless device. Aspects include generating a verification scheme for testing the integrity of firmware on a wireless device and transmitting the verification scheme to the wireless device. The wireless device applies the verification scheme to the firmware and obtains a verification test result, which is forwarded for analysis. An analyzer compares the generated verification test result with a predetermined test result to obtain an integrity determination that indicates the integrity of the firmware. In some aspects, control commands to change an operational characteristic of the wireless device may be generated based on the integrity determination.

Abstract: Detection and management methods and apparatus for wireless devices may include an executable instruction authorization module operable to scan executable instructions on a wireless device, generate a log indicative of a virus or otherwise unauthorized executable instructions based on a received authorization configuration, and forward the log to a user manager. The user manager may be operable to analyze the log and generate an authorization report which may be viewable by an operator to determine the disposition of unauthorized executable instructions. At least one of the executable instruction authorization module, the user manager, and the operator may be operable to generate a control command operable to delete, or otherwise disable, unauthorized executable instructions on the wireless device, or to restore the executable instructions on the wireless device.

Abstract: A communication device (100) employs a local oscillator (104) having an improved charge pump circuit (122). The charge pump circuit (122) has current mirrors (204, 208) in which a first transistor (224, 270) is biased to provide a substantially constant current. A resistor (226, 272) selectively conducts a reference current to bias a mirror transistor (228, 274). The current mirror (204, 208) provides improved dynamic performance thereby reducing global phase error of the communication device (100).

Abstract: A pulse detector keeps track of the peak value of an analog input signal and clocks output data pulses into a flipflop and shift register at peak values thereof while it monotonically increases in magnitude for each polarity. The data input to the flipflop becomes logic zero once the analog input signal changes direction toward the opposite polarity, whereby the last output data pulse in the shift register corresponds to the maximum peak of the analog input signal during the given polarity.

Abstract: A deglitch circuit for suppressing transient signals that appear at an output node includes a bias circuit for providing a bias signal; a transistor having its collector-emitter conduction path coupled in series to the output node and having a base coupled to the bias signal; and a capacitive element coupled between the output node and the base of the transistor for rendering the transistor conductive in response to a transient signal such that a low impedance circuit path is presented to the transient signal.

Abstract: A peak detector circuit that provides a signal at an output terminal which represents the most positive peak voltage level applied at an input terminal. Comparator circuit is coupled to the input terminal and to the output terminal to determine which voltage signal thereof is more positive to provide an output current whenever the supplied input voltage exceeds the voltage at the output terminal. The output current is then amplified for providing a current to a capacitor circuit for developing a voltage across the capacitor equal to the positive peak voltage level applied at the input terminal. A buffer circuit coupled to the capacitor circuit transforms the voltage across capacitor circuit to the output terminal and includes a clamping circuit for clamping coupled between the output terminal and the comparator circuit to prevent the comparator circuit output from saturating whenever the voltage applied at the input terminal is less than that appearing at the output terminal.

Abstract: A current mode logic gate for logically combining input logic signals is comprised of a first pair of transistors each having a base, collector and at least one emitter with the emitters being coupled together to a current source while the bases are respectively coupled to first and second inputs of the gate. At least one other pair of transistors are provided the bases of which are coupled to third and fourth inputs of the gate while the collectors are respectively coupled to first and second outputs of the gate. Each of the transistors of the other pair have first and second emitters with the first emitters being coupled to the collector of one of the transistors of the first pair of transistors while the second emitter of one of the transistors of the other pair is coupled to the collector of the other one of the first pair of transistors. The second emitter of the other one of the other pair of transistors is either left open-circuited or is shorted to its base.