Abstract: Low power non-volatile non-charge-based variable supply RFID tag memory devices and methods for reading and writing predetermined ID values for a RFID tag are described. The RFID tag memory device includes a reference/bias generator that receives and provides voltages and currents for write and read operations, a clocked comparator that provides a voltage comparison with a reference voltage, a shift register that receives a non-charge-based memory component value saved in the shift register, a memory cell that includes non-charge-based memory components to store corresponding predetermined ID values, a ring counter that provides ring signals to enable sequential writing and reading of the predetermined ID values to and from the memory cell, a write decision component that receives ring signals to enable the write operation, an output select/isolation component for reading and a read/write component to enable reading or writing the predetermined ID values in response to received ring signals.

Abstract: Low power non-volatile non-charge-based variable supply RFID tag memory devices and methods for reading and writing predetermined ID values for a RFID tag are described. The RFID tag memory device includes a reference/bias generator that receives and provides voltages and currents for write and read operations, a clocked comparator that provides a voltage comparison with a reference voltage, a shift register that receives a non-charge-based memory component value saved in the shift register, a memory cell that includes non-charge-based memory components to store corresponding predetermined ID values, a ring counter that provides ring signals to enable sequential writing and reading of the predetermined ID values to and from the memory cell, a write decision component that receives ring signals to enable the write operation, an output select/isolation component for reading and a read/write component to enable reading or writing the predetermined ID values in response to received ring signals.

Abstract: Low-power, dual sensitivity thin oxide FG-MOSFET sensors in RF-CMOS technology for a wireless X-ray dosimeter chip, methods for radiation measurement and for charging and discharging the sensors are described. The FG-MOSFET sensor from a 0.13 ?m (RF-CMOS process, includes a thin oxide layer having a device region, a source and a drain associated with the device well region, separated by a channel region, a floating gate extending over the channel region, and a floating gate extension extending over the thin oxide layer adjacent to the device well region. In a matched sensor pair for dual sensitivity radiation measurement, the floating gate and the floating gate extension of a FG-MOSFET higher sensitivity sensor are without a salicide layer or a silicide layer formed thereon and the floating gate and the floating gate extension of a FG-MOSFET lower sensitivity sensor have a salicide layer or a silicide layer formed thereon.

Abstract: Low-power, dual sensitivity thin oxide FG-MOSFET sensors in RF-CMOS technology for a wireless X-ray dosimeter chip, methods for radiation measurement and for charging and discharging the sensors are described. The FG-MOSFET sensor from a 0.13 ?m (RF-CMOS process, includes a thin oxide layer having a device region, a source and a drain associated with the device well region, separated by a channel region, a floating gate extending over the channel region, and a floating gate extension extending over the thin oxide layer adjacent to the device well region. In a matched sensor pair for dual sensitivity radiation measurement, the floating gate and the floating gate extension of a FG-MOSFET higher sensitivity sensor are without a salicide layer or a silicide layer formed thereon and the floating gate and the floating gate extension of a FG-MOSFET lower sensitivity sensor have a salicide layer or a silicide layer formed thereon.

Abstract: Low power non-volatile non-charge-based variable supply RFID tag memory devices and methods for reading and writing predetermined ID values for a RFID tag are described. The RFID tag memory device includes a reference/bias generator that receives and provides voltages and currents for write and read operations, a clocked comparator that provides read and write clock signals, a shift register that receives a non-charge-based memory component read voltage saved in the shift register, a memory cell that includes non-charge-based memory components to store corresponding predetermined ID values, a ring counter that provides ring signals to the shift register to enable sequential writing and reading of the predetermined ID values to and from the memory cell, a write decision component that receives ring signals to enable the write operation, an output select/isolation component and a read/write component that receive the ring signals to enable reading the predetermined ID values.