Abstract: A controller chip includes a first cluster including one or more first controller units, a first power supply grid, a first clock tree structure to supply one or more clock signals, and at least a first power supply input. A second cluster includes one or more second controller units, a second power supply grid, a second clock tree structure to supply one or more clock signals, and at least a second power supply input. A monitoring cluster includes a monitoring circuit configured to: monitor the power supply and the clock signal supply of each of the first cluster and second cluster, and in the event of determining at least one of a power supply failure or a clock signal supply failure in one cluster of the first cluster or the second cluster, indicate the failure to the other cluster to take one or more actions.

Abstract: A radar system may include a set of analog components to perform one or more radio frequency (RF) operations during an active radar phase of the radar system. The radar system may include a set of digital components to perform one or more digital processing operations during at least a digital processing phase of the radar system. The one or more digital processing operations may be performed such that performance of the one or more digital processing operations does not overlap performance of a substantive portion of the one or more RF operations.

Abstract: Systems, methods, and circuitries are provided for controlling a microcontroller (MCU) on a per-application basis. A control system includes a microcontroller unit (MCU) including a first application group and a second application group. The first application group includes at least one hardware component not associated with the second application group. The control system includes a power management integrated circuit (PMIC). The PMIC includes monitoring circuitry configured to monitor the first application group to detect a first application group fault condition and monitor the second application group to detect a second application group fault condition. Based on the monitoring, the PMIC provides a first reset signal to the first application group that does not reset the second application group or provides a second reset signal to the second application group that does not reset the first application group.

Abstract: Systems, methods, and circuitries are provided for controlling a microcontroller (MCU) on a per-application basis. A control system includes a microcontroller unit (MCU) including a first application group and a second application group. The first application group includes at least one hardware component not associated with the second application group. The control system includes a power management integrated circuit (PMIC). The PMIC includes monitoring circuitry configured to monitor the first application group to detect a first application group fault condition and monitor the second application group to detect a second application group fault condition. Based on the monitoring, the PMIC provides a first reset signal to the first application group that does not reset the second application group or provides a second reset signal to the second application group that does not reset the first application group.

Abstract: A controller chip includes a first cluster including one or more first controller units, a first power supply grid, a first clock tree structure to supply one or more clock signals, and at least a first power supply input. A second cluster includes one or more second controller units, a second power supply grid, a second clock tree structure to supply one or more clock signals, and at least a second power supply input. A monitoring cluster includes a monitoring circuit configured to: monitor the power supply and the clock signal supply of each of the first cluster and second cluster, and in the event of determining at least one of a power supply failure or a clock signal supply failure in one cluster of the first cluster or the second cluster, indicate the failure to the other cluster to take one or more actions.

Abstract: A radar system may include a set of analog components to perform one or more radio frequency (RF) operations during an active radar phase of the radar system. The radar system may include a set of digital components to perform one or more digital processing operations during at least a digital processing phase of the radar system. The one or more digital processing operations may be performed such that performance of the one or more digital processing operations does not overlap performance of a substantive portion of the one or more RF operations.

Abstract: A device for operating an apparatus comprising a first controller configured to be controlled by a first control signal, a second controller configured to be controlled by a second control signal, a control unit operatively connected to the first controller and the second controller, wherein the first controller and the second controller are both configured to operate the apparatus.

Abstract: A device for operating an apparatus comprising a first controller configured to be controlled by a first control signal, a second controller configured to be controlled by a second control signal, a control unit operatively connected to the first controller and the second controller, wherein the first controller and the second controller are both configured to operate the apparatus.

Abstract: A device for operating an apparatus comprising a first controller configured to be controlled by a first control signal, a second controller configured to be controlled by a second control signal, a control unit operatively connected to the first controller and the second controller, wherein the first controller and the second controller are both configured to operate the apparatus.

Abstract: A device for operating an apparatus comprising a first controller configured to be controlled by a first control signal, a second controller configured to be controlled by a second control signal, a control unit operatively connected to the first controller and the second controller, wherein the first controller and the second controller are both configured to operate the apparatus.

Abstract: A device for operating an apparatus comprising a first controller configured to be controlled by a first control signal, a second controller configured to be controlled by a second control signal, a control unit operatively connected to the first controller and the second controller, wherein the first controller and the second controller are both configured to operate the apparatus.

Abstract: One embodiment of the present invention relates to a low-power micro-controller unit having both a standby micro-controller optimized for low power consumption and a main micro-controller optimized for high performance. A power supply is coupled to the main micro-controller and the standby micro-controller. The power supply provides power to one or more of the low-power, standby micro-controller and the high performance, main micro-controller by separate power supply paths, depending on system needs. The separate power supply paths allow the main micro-controller and the standby micro-controller operate independent of each other. During a low-power standby operating mode, power can be disconnected to the main micro-controller, while providing power to the standby micro-controller, thereby eliminating the leakage current associated with the large number of transistors in the main micro-controller, while still retaining the computational capabilities of the standby micro-controller.

Abstract: One embodiment of the present invention relates to a low-power micro-controller unit having both a standby micro-controller optimized for low power consumption and a main micro-controller optimized for high performance. A power supply is coupled to the main micro-controller and the standby micro-controller. The power supply provides power to one or more of the low-power, standby micro-controller and the high performance, main micro-controller by separate power supply paths, depending on system needs. The separate power supply paths allow the main micro-controller and the standby micro-controller operate independent of each other. During a low-power standby operating mode, power can be disconnected to the main micro-controller, while providing power to the standby micro-controller, thereby eliminating the leakage current associated with the large number of transistors in the main micro-controller, while still retaining the computational capabilities of the standby micro-controller.

Abstract: The invention relates to a method for regulating the lambda value of an internal combustion engine with a catalytic converter for subsequently treating the exhaust gases of the internal combustion engine, with a binary lambda probe, which is mounted upstream from the catalytic converter and which senses the composition of the exhaust gases. According to the invention, the lambda set value is superimposed with a lean/rich amplitude. This lean/rich amplitude has an integral component and a discontinuous component leading back to the lambda set value. When a change that differs from the change in the exhaust gas composition caused by the lean/rich amplitude is detected, the coefficient of the integral component is modified and/or a discontinuous component is added to the integral component or subtracted therefrom.

Abstract: The invention relates to a method for regulating the lambda value of an internal combustion engine with a catalytic converter for subsequently treating the exhaust gases of the internal combustion engine, with a binary lambda probe, which is mounted upstream from the catalytic converter and which senses the composition of the exhaust gases. According to the invention, the lambda set value is superimposed with a lean/rich amplitude. This lean/rich amplitude has an integral component and a discontinuous component leading back to the lambda set value. When a change that differs from the change in the exhaust gas composition caused by the lean/rich amplitude is detected, the coefficient of the integral component is modified and/or a discontinuous component is added to the integral component or subtracted therefrom.