Patents by Inventor Ben Chunben Wang

Ben Chunben Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Reset sequencing for reducing noise on a power distribution network
    Patent number: 10242141
    Abstract: A computer-implemented method includes receiving a first circuit design for an integrated circuit device, determining when multiple power-drawing events are to occur at substantially the same time via one or more circuitry components of the integrated circuit device, which would have a disruptive effect on a power distribution network of the integrated circuit device, based on the first circuit design, and generating logic that schedules the more than one event so that the more than one event do not occur simultaneously. The logic is included in an event sequencer. The method also includes inserting the event sequencer into the first circuit design during compilation to create a second circuit design and outputting the second circuit design to be implemented on the integrated circuit device.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: March 26, 2019
    Assignee: Altera Corporation
    Inventors: Jakob Raymond Jones, Tim Tri Hoang, Ben Chunben Wang
  • Reset Sequencing for Reducing Noise on a Power Distribution Network
    Publication number: 20180089355
    Abstract: A computer-implemented method includes receiving a first circuit design for an integrated circuit device, determining when multiple power-drawing events are to occur at substantially the same time via one or more circuitry components of the integrated circuit device, which would have a disruptive effect on a power distribution network of the integrated circuit device, based on the first circuit design, and generating logic that schedules the more than one event so that the more than one event do not occur simultaneously. The logic is included in an event sequencer. The method also includes inserting the event sequencer into the first circuit design during compilation to create a second circuit design and outputting the second circuit design to be implemented on the integrated circuit device.
    Type: Application
    Filed: September 27, 2016
    Publication date: March 29, 2018
    Inventors: Jakob Raymond Jones, Tim Tri Hoang, Ben Chunben Wang