Patents by Inventor Ben D. Roberts

Ben D. Roberts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Projection system
    Patent number: 7268935
    Abstract: An apparatus includes a mirror array to form a projected image that includes pixels. The apparatus also includes a circuit to, for each pixel, control the mirror array to selectively combine reflected light from at least two mirrors of the array to regulate an intensity of the pixel.
    Type: Grant
    Filed: January 3, 2006
    Date of Patent: September 11, 2007
    Assignee: Intel Corporation
    Inventor: Ben D. Roberts
  • Projection system
    Patent number: 6999227
    Abstract: An apparatus includes a mirror array to form a projected image that includes pixels. The apparatus also includes a circuit to, for each pixel, control the mirror array to selectively combine reflected light from at least two mirrors of the array to regulate an intensity of the pixel.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: February 14, 2006
    Assignee: Intel Corporation
    Inventor: Ben D. Roberts
  • Method and apparatus for calculating interconnect noise due to cross capacitance in the presence of line resistance
    Patent number: 6853967
    Abstract: A method that creates a string that models a trace, the string having a collection of lumped elements, where at least one of the lumped elements has a cross capacitor. The method reduces the string to a pi model where the pi model has a cross capacitor. The method simulates the application of an applied noise voltage to the cross capacitor.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: February 8, 2005
    Assignee: Intel Corporation
    Inventor: Ben D. Roberts
  • Digital-to-analog converter
    Patent number: 4281319
    Abstract: A bipolar converter for analog and digital conversion is based on a single-ended MOS chip having a grounded substrate. The MOS chip includes a 2.sup.N R ladder and an on-chip output polarity switch which establishes the polarity and range of a separate bipolar output amplifier while it minimizes the number of power supplies. The resolution of the MOS chip is effectively doubled without substantially increasing element count. A matrix decoder is employed in a tree decoder to minimize the physical size and element count of the tree decoder.
    Type: Grant
    Filed: June 30, 1980
    Date of Patent: July 28, 1981
    Assignee: Ricoh Company, Ltd.
    Inventor: Ben D. Roberts, Jr.