Abstract: A satellite receiver that is operable in a single cable system and that is configured to receiver satellite signals via an interface, comprises a controller configured to instruct the interface to perform a blind channel scan process over a predetermined frequency range to obtain measured spectrum signals and to change the predetermined frequency range until a desired frequency range has been measured. The satellite receiver further comprises a processing device configured to receive the measured spectrum signals, to process the measured spectrum signals to obtain a spectrum section and to concatenate the measured spectrum sections to obtain a spectrum.

Abstract: A method for processing an analog television signal. A reference signal based on a field synchronizing signal of the analog television signal and equalizing the analog television signal based on the reference signal are determined. The reference signal is determined by calculating a difference between a first part of the field synchronizing signal and a second part of the field synchronizing signal, wherein the first and second parts are selected such that the reference signal is non-zero.

Abstract: A quadrature demodulator receiver unit (100) comprises a first filter unit (360) that may delay an intermediate signal x(t) whose real part is based on a sampled in-phase IF signal (xi(t)) and whose imaginary part is based on a sampled quadrature IF signal (xq(t)). A second filter unit (366) filters a conjugate complex version of the intermediate signal x(t). The filter coefficients of the filter units (360, 366) are determined using a calibration signal, for example on the basis of ratios of complex-valued spectral components of intermediate signals xcal(t) obtained from the calibration signal cal(t). The filtered signal and the delayed signal are recombined to obtain a compensated output signal y(t). The calibration signal may be supplied from an oscillator circuit supplying a signal for processing a receive signal of the receiver unit (100).

Abstract: A method for identifying an electrical device connected to a mains grid is provided, the method comprising measuring at least one electrical characteristic on the mains grid with a sensor connected to a socket of the mains grid; comparing the at least one electrical characteristic with a plurality of stored candidate electrical characteristics each corresponding to one of a plurality of candidate electrical devices; and identifying the electrical device based on the stored candidate electrical characteristic that is closest to the at least one electrical characteristic. A corresponding system and a corresponding sensor are provided as well.

Abstract: A compensator unit compensates frequency-dependent imbalance between a sampled in-phase and a sampled quadrature phase signal. The compensator unit includes a delay channel (381) and a filter channel (382). The delay channel (381) delays an intermediate signal x(t), which is obtained by superposition of the sampled in-phase and quadrature phase signals, by an integer multiple greater than zero. The filter channel (382) includes a filter (320) with a complex conjugated block (321) and with variable filter coefficients determined on base of autocorrelation function values of the intermediate signal x(t). The filter coefficients are determined such that the complementary autocorrelation of a compensator output signal y(t) is minimized for the filter span.

Abstract: A method for processing an analog television signal, comprising determining a reference signal based on at least one field synchronizing signal and equalizing the analog television signal based on the reference signal.

Abstract: Demodulator for demodulating an input signal, comprising a complex-valued equalizer configured to equalize complex valued echoes within said input signal, wherein said complex-valued equalizer outputs a complex valued equalized signal; and a PLL circuit (209) including a PLL sub-unit (340), wherein said complex valued equalized signal (336) or a derivative thereof is used as input signal for said PLL sub-unit (340).

Abstract: Circuit for processing an input signal based on at least one reference signal, comprising a phase locked loop demodulator configured to receive a speed control signal and said input signal and further configured to follow a frequency and/or a phase of said input signal at a speed, wherein said speed depends on said speed control signal; and a reference signal detector configured to determine said at least one reference signal and to set said speed by outputting said speed control signal to said phase locked loop demodulator, wherein, if said reference signal detector detects said at least one reference signal, said reference signal detector decreases said speed.

Abstract: An adaptive filter device, including a finite impulse response (FIR) filter which is based on filter coefficients, which are determined based on a predetermined iterative adaptation algorithm for determining filter coefficients of an adaptive filter, wherein, in at least one iteration step of said predetermined iterative adaptation algorithm a sum value is determined, wherein each summand of said sum value depends on one of said filter coefficients, and, if said sum value is above a predetermined threshold, the filter coefficients are modified.