Abstract: A method and system for generation of low-slew indices for circuit characterization are disclosed. In one embodiment, a method for automatically generating a subset of sampling points from a set of load and slew points for circuit characterization includes iteratively obtaining sampling points such that error between an actual value and an interpolated intermediate value is below or equal to a threshold error value. The subset of sampling points is then formed from the iteratively obtained sampling points.

Abstract: A method and system of digital circuit functionality recognition for circuit characterization is disclosed. In one embodiment, a method for determining the valid arcs includes receiving a truth table including state information associated with input pins and their associated output pins in the digital circuit. Valid arcs are then determined based on whether a change in each of the input pins causes a change in associated one of the output pins using the received truth table. A first arc table is then formed using state information associated with substantially the determined valid arcs. Redundant arcs are then identified in the first arc table using the associated state information. A second arc table is then formed by removing the state information associated with the redundant arcs from the first arc table.

Abstract: A method and system for generation of low-slew indices for circuit characterization are disclosed. In one embodiment, a method for automatically generating a subset of sampling points from a set of load and slew points for circuit characterization includes iteratively obtaining sampling points such that error between an actual value and an interpolated intermediate value is below or equal to a threshold error value. The subset of sampling points is then formed from the iteratively obtained sampling points.

Abstract: A method and system of digital circuit functionality recognition for circuit characterization is disclosed. In one embodiment, a method for determining the valid arcs includes receiving a truth table including state information associated with input pins and their associated output pins in the digital circuit. Valid arcs are then determined based on whether a change in each of the input pins causes a change in associated one of the output pins using the received truth table. A first arc table is then formed using state information associated with substantially the determined valid arcs. Redundant arcs are then identified in the first arc table using the associated state information. A second arc table is then formed by removing the state information associated with the redundant arcs from the first arc table.