Patents by Inventor Ben Witulski

Ben Witulski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240406148
    Abstract: In one embodiment, a system includes a networking device including a network interface to receive network packets having headers including datagram transport layer security (DTLS) headers from a remote device over a packet data network, packet processing circuitry to identify first packets of the received packets for DTLS processing in the packet processing circuitry, identify second packets of the received packets to bypass DTLS processing in the packet processing circuitry and to be provided to software to perform DTLS processing on the second packets, and perform DTLS processing on the first packets, and a host interface to provide the DTLS processed first packets to the software, and provide the second packets to the software to perform DTLS processing on the second packets.
    Type: Application
    Filed: April 4, 2024
    Publication date: December 5, 2024
    Inventors: Uria Basher, Michael Tahar, Amir Modan, Ben Witulski, Miriam Menes, Miri Shtaif
  • Patent number: 12131132
    Abstract: An Integrated Montgomery Calculation Engine (IMCE), for multiplying two multiplicands modulo a predefined number, includes a Carry Save Adder (CSA) circuit and control circuitry. The CSA circuit has multiple inputs, and has outputs including a sum output and a carry output. The control circuitry is coupled to the inputs and the outputs of the CSA circuit and is configured to operate the CSA circuit in at least (i) a first setting that calculates a Montgomery precompute value and (ii) a second setting that calculates a Montgomery multiplication of the two multiplicands.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: October 29, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Adir Zevulun, Uria Basher, Nir Shmuel, Ben Witulski
  • Patent number: 12079594
    Abstract: A Montgomery multiplication apparatus (MMA), for multiplying two multiplicands modulo a predefined number, includes a pre-compute circuit and a Montgomery multiplication circuit. The pre-compute circuit is configured to compute a Montgomery pre-compute value by performing a series of iterations. In a given iteration, the pre-compute circuit is configured to modify one or more intermediate values by performing bit-wise operations on the intermediate values calculated in a preceding iteration. The Montgomery multiplication circuit is configured to multiply the two multiplicands, modulo the predefined number, by performing a plurality of Montgomery reduction operations using the Montgomery pre-compute value computed by the pre-compute circuit.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: September 3, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Adir Zevulun, Uria Basher, Nir Shmuel, Ben Witulski
  • Publication number: 20220269487
    Abstract: An Integrated Montgomery Calculation Engine (IMCE), for multiplying two multiplicands modulo a predefined number, includes a Carry Save Adder (CSA) circuit and control circuitry. The CSA circuit has multiple inputs, and has outputs including a sum output and a carry output. The control circuitry is coupled to the inputs and the outputs of the CSA circuit and is configured to operate the CSA circuit in at least (i) a first setting that calculates a Montgomery precompute value and (ii) a second setting that calculates a Montgomery multiplication of the two multiplicands.
    Type: Application
    Filed: February 22, 2021
    Publication date: August 25, 2022
    Inventors: Adir Zevulun, Uria Basher, Nir Shmuel, Ben Witulski
  • Publication number: 20220269488
    Abstract: A Montgomery multiplication apparatus (MMA), for multiplying two multiplicands modulo a predefined number, includes a pre-compute circuit and a Montgomery multiplication circuit. The pre-compute circuit is configured to compute a Montgomery pre-compute value by performing a series of iterations. In a given iteration, the pre-compute circuit is configured to modify one or more intermediate values by performing bit-wise operations on the intermediate values calculated in a preceding iteration. The Montgomery multiplication circuit is configured to multiply the two multiplicands, modulo the predefined number, by performing a plurality of Montgomery reduction operations using the Montgomery pre-compute value computed by the pre-compute circuit.
    Type: Application
    Filed: February 22, 2021
    Publication date: August 25, 2022
    Inventors: Adir Zevulun, Uria Basher, Nir Shmuel, Ben Witulski