Patents by Inventor Benedict Drevniok

Benedict Drevniok has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10866683
    Abstract: A device includes a housing defining part of an interior volume and an opening to the interior volume; a cover mounted to the housing to cover the opening and further define the interior volume; a display mounted within the interior volume and viewable through the cover; and a system in package (SiP) mounted within the interior volume. The SiP includes a self-capacitance sense pad adjacent a first surface of the SiP; a set of solder structures attached to a second surface of the SiP, the second surface opposite the first surface; and an IC coupled to the self-capacitance sense pad and configured to output, at one or more solder structures in the set of solder structures, a digital value related to a measured capacitance of the self-capacitance sense pad. The SiP is mounted within the interior volume with the first surface positioned closer to the cover than the second surface.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: December 15, 2020
    Assignee: Apple Inc.
    Inventors: Pavan O. Gupta, Andrew W. Joyce, Benedict Drevniok, Mo Li, David S. Graff, Albert Lin, Julian K. Shutzberg, Hojjat Seyed Mousavi
  • Publication number: 20200064952
    Abstract: A device includes a housing defining part of an interior volume and an opening to the interior volume; a cover mounted to the housing to cover the opening and further define the interior volume; a display mounted within the interior volume and viewable through the cover; and a system in package (SiP) mounted within the interior volume. The SiP includes a self-capacitance sense pad adjacent a first surface of the SiP; a set of solder structures attached to a second surface of the SiP, the second surface opposite the first surface; and an IC coupled to the self-capacitance sense pad and configured to output, at one or more solder structures in the set of solder structures, a digital value related to a measured capacitance of the self-capacitance sense pad. The SiP is mounted within the interior volume with the first surface positioned closer to the cover than the second surface.
    Type: Application
    Filed: August 23, 2019
    Publication date: February 27, 2020
    Inventors: Pavan O. Gupta, Andrew W. Joyce, Benedict Drevniok, Mo Li, David S. Graff, Albert Lin, Julian K. Shutzberg, Hojjat Seyed Mousavi