Abstract: A packet switched communications system for transmitting synchronous data from a source module (4) to a terminating module (8) over a network comprises plurality of modules (4, 5, 7, 8) interconnected via transmission links (2, 6, 9). Each module operates with a clock of nominal frequency but which is not synchronised with the clocks of the other module(s) and has a single input and one or more outputs where all the outputs are phase locked to each other but are not synchronised with respect to the input. The system includes means (405, 504) for determining the accumulated phase difference between the input clock and the output clock of each module, and means (5, 7) for transmitting the accumulated phase difference to the terminating module (8) in the network. The received accumulated phase difference at the terminating module (8) is used to lock the output clock at the terminating module to the input clock at the source module.