Patents by Inventor Bengt Werdin

Bengt Werdin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Access scheduler
    Patent number: 8990498
    Abstract: Embodiments of the present invention provide a system for scheduling memory accesses for one or more memory devices. This system includes a set of queues configured to store memory access requests, wherein each queue is associated with at least one memory bank or memory device in the one or more memory devices. The system also includes a set of hierarchical levels configured to select memory access requests from the set of queues to send to the one or more memory devices, wherein each level in the set of hierarchical levels is configured to perform a different selection operation.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: March 24, 2015
    Assignee: Marvell World Trade Ltd.
    Inventors: Vitaly Sukonik, Sarig Livne, Bengt Werdin
  • ACCESS SCHEDULER
    Publication number: 20140115254
    Abstract: Embodiments of the present invention provide a system for scheduling memory accesses for one or more memory devices. This system includes a set of queues configured to store memory access requests, wherein each queue is associated with at least one memory bank or memory device in the one or more memory devices. The system also includes a set of hierarchical levels configured to select memory access requests from the set of queues to send to the one or more memory devices, wherein each level in the set of hierarchical levels is configured to perform a different selection operation.
    Type: Application
    Filed: November 27, 2013
    Publication date: April 24, 2014
    Applicant: Marvell International Ltd.
    Inventors: Vitaly SUKONIK, Sarig Livne, Bengt Werdin
  • Access scheduler
    Patent number: 8615629
    Abstract: Embodiments of the present invention provide a system for scheduling memory accesses for one or more memory devices. This system includes a set of queues configured to store memory access requests, wherein each queue is associated with at least one memory bank or memory device in the one or more memory devices. The system also includes a set of hierarchical levels configured to select memory access requests from the set of queues to send to the one or more memory devices, wherein each level in the set of hierarchical levels is configured to perform a different selection operation.
    Type: Grant
    Filed: January 12, 2011
    Date of Patent: December 24, 2013
    Assignee: Marvell International Ltd.
    Inventors: Vitaly Sukonik, Sarig Livne, Bengt Werdin
  • ACCESS SCHEDULER
    Publication number: 20110179240
    Abstract: Embodiments of the present invention provide a system for scheduling memory accesses for one or more memory devices. This system includes a set of queues configured to store memory access requests, wherein each queue is associated with at least one memory bank or memory device in the one or more memory devices. The system also includes a set of hierarchical levels configured to select memory access requests from the set of queues to send to the one or more memory devices, wherein each level in the set of hierarchical levels is configured to perform a different selection operation.
    Type: Application
    Filed: January 12, 2011
    Publication date: July 21, 2011
    Applicant: XELERATED AB
    Inventors: Vitaly Sukonik, Sarig Livne, Bengt Werdin