Patents by Inventor Benito Fernandez

Benito Fernandez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7555507
    Abstract: An apparatus for solving time-continuous differential equations is disclosed. The apparatus includes a group of hybrid integrators interconnected to each other. Each one of the hybrid integrators includes an analog integrator, a conversion logic and multiple digital registers. The analog integrator generates an analog output, and the conversion logic along with the digital registers converts the analog output to a digital output. The analog output and the digital output are then combined to yield an integrated output. The integrated output is fed to the hybrid integrators within the group.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: June 30, 2009
    Assignee: Board of Regents, The University of Texas System
    Inventors: Michael Bryant, Ashish Seth, Benito Fernandez
  • Publication number: 20060117083
    Abstract: An apparatus for solving time-continuous differential equations is disclosed. The apparatus includes a group of hybrid integrators interconnected to each other. Each one of the hybrid integrators includes an analog integrator, a conversion logic and multiple digital registers. The analog integrator generates an analog output, and the conversion logic along with the digital registers converts the analog output to a digital output. The analog output and the digital output are then combined to yield an integrated output. The integrated output is fed to the hybrid integrators within the group.
    Type: Application
    Filed: December 16, 2005
    Publication date: June 1, 2006
    Inventors: Michael Bryant, Ashish Seth, Benito Fernandez
  • Patent number: 5479571
    Abstract: The present invention is a fully connected feed forward network that includes at least one hidden layer 16. The hidden layer 16 includes nodes 20 in which the output of the node is fed back to that node as an input with a unit delay produced by a delay device 24 occurring in the feedback path 22 (local feedback). Each node within each layer also receives a delayed output (crosstalk) produced by a delay unit 36 from all the other nodes within the same layer 16. The node performs a transfer function operation based on the inputs from the previous layer and the delayed outputs. The network can be implemented as analog or digital or within a general purpose processor. Two teaching methods can be used: (1) back propagation of weight calculation that includes the local feedback and the crosstalk or (2) more preferably a feed forward gradient decent which immediately follows the output computations and which also includes the local feedback and the crosstalk.
    Type: Grant
    Filed: April 13, 1993
    Date of Patent: December 26, 1995
    Assignee: The Texas A&M University System
    Inventors: Alexander G. Parlos, Amir F. Atiya, Benito Fernandez, Wei K. Tsai, Kil T. Chong
  • Patent number: D999072
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: September 19, 2023
    Inventors: Benito Fernandez, Juan Rincón