Abstract: A method of performing a single step/single solvent edge bead removal (EBR) process on a photolithography layer stack including a photoresist layer and a top coat layer using propylene glycol monomethyl ether acetate (PGMEA) or a mixture of PGMEA and gamma-butyrolactone (GBL) is disclosed. The single step/single solvent EBR process is compatible with organic and inorganic BARC layers.

Abstract: Exemplary embodiments provide a method for laying out an IC design and the IC design layout. The IC design layout can include one or more gate features placed on an active region including a first pitch (p1) between any two adjacent gate features. Additionally, the IC design layout can include a printable-gate-assist feature placed adjacent to at least one side of the active region, and placed parallel to and at a second pitch (p2) from one first gate feature of the one or more gate features. In various embodiments, a printable-gate-extension feature can be drawn in the design to extend a second gate feature to match a length with a longer neighboring gate feature of the one or more gate features.

Abstract: The present disclosure is directed a method for preparing photomask patterns. The method comprises receiving drawn pattern data for a design database. The drawn pattern data describes first device features and second device features, the second device features being associated with design specifications for providing a desired connectivity of the first device features to the second device features. At least a first plurality of the first device features have drawn patterns that will not result in sufficient coverage to effect the desired connectivity. Photomask patterns are formed for the first device features, wherein the photomask patterns for the first plurality of the first device features will result in the desired coverage. Integrated circuit devices formed using the principles of the present disclosure are also taught.

Abstract: In accordance with the invention, there are methods of making an integrated circuit, an integrated circuit device, and a computer readable medium. A method can comprise forming a first layer over a semiconductor substrate, forming a first mask layer over the semiconductor substrate, and using the first mask layer to pattern first features. The method can also include forming a second mask layer over the first features, using the second mask layer to pattern portions of the first features, removing the second mask layer, and removing the first mask layer.

Abstract: In accordance with various embodiments, semiconductor devices and methods of forming semiconductor devices having non-rectangular active regions are provided. An exemplary method includes using a first mask to form a plurality of first features over a non-rectangular shaped active region and at least one ghost feature, wherein the plurality of first features extend beyond an edge of the non-rectangular shaped active region. The method further includes using a second mask to remove a portion of the plurality of first features extending beyond the edge of the non-rectangular shaped active region and the at least one ghost feature.

Abstract: According to various embodiments, two-print two-etch methods and devices are disclosed that can be used to form features, such as ghost features, on a substrate. The disclosed methods can be incorporated into, for example, altPSM, attPSM, and binary lithographic method for making semiconductor devices. a method of forming a semiconductor device is provided. The exemplary methods can include defining a plurality of first features and at least one ghost feature on a photosensitive layer by exposing a first mask to a light, wherein the first mask comprises a plurality of phase shift areas that change a phase of the light. A portion of a layer disposed under the photosensitive layer can be removed by etching to form the plurality of first features and the at least one ghost feature. One or more structures not requiring phase shifting can then be defined on the photosensitive layer by exposing a second mask to the light, wherein the second mask removes the at least one ghost feature.

Abstract: Exemplary embodiments provide a method for laying out an IC design and the IC design layout. The IC design layout can include one or more gate features placed on an active region including a first pitch (p1) between any two adjacent gate features. Additionally, the IC design layout can include a printable-gate-assist feature placed adjacent to at least one side of the active region, and placed parallel to and at a second pitch (p2) from one first gate feature of the one or more gate features. In various embodiments, a printable-gate-extension feature can be drawn in the design to extend a second gate feature to match a length with a longer neighboring gate feature of the one or more gate features.

Abstract: A method of performing a single step/single solvent edge bead removal (EBR) process on a photolithography layer stack including a photoresist layer and a top coat layer using propylene glycol monomethyl ether acetate (PGMEA) or a mixture of PGMEA and gamma-butyrolactone (GBL) is disclosed. The single step/single solvent EBR process is compatible with organic and inorganic BARC layers.

Abstract: The present disclosure is directed a method for preparing photomask patterns. The method comprises receiving drawn pattern data for a design database. The drawn pattern data describes first device features and second device features, the second device features being associated with design specifications for providing a desired connectivity of the first device features to the second device features. At least a first plurality of the first device features have drawn patterns that will not result in sufficient coverage to effect the desired connectivity. Photomask patterns are formed for the first device features, wherein the photomask patterns for the first plurality of the first device features will result in the desired coverage. Integrated circuit devices formed using the principles of the present disclosure are also taught.

Abstract: In accordance with various embodiments, semiconductor devices and methods of forming semiconductor devices having non-rectangular active regions are provided. An exemplary method includes using a first mask to form a plurality of first features over a non-rectangular shaped active region and at least one ghost feature, wherein the plurality of first features extend beyond an edge of the non-rectangular shaped active region. The method further includes using a second mask to remove a portion of the plurality of first features extending beyond the edge of the non-rectangular shaped active region and the at least one ghost feature.

Abstract: According to various embodiments, two-print two-etch methods and devices are disclosed that can be used to form features, such as ghost features, on a substrate. The disclosed methods can be incorporated into, for example, altPSM, attPSM, and binary lithographic method for making semiconductor devices. a method of forming a semiconductor device is provided. The exemplary methods can include defining a plurality of first features and at least one ghost feature on a photosensitive layer by exposing a first mask to a light, wherein the first mask comprises a plurality of phase shift areas that change a phase of the light. A portion of a layer disposed under the photosensitive layer can be removed by etching to form the plurality of first features and the at least one ghost feature. One or more structures not requiring phase shifting can then be defined on the photosensitive layer by exposing a second mask to the light, wherein the second mask removes the at least one ghost feature.