Abstract: Method for effecting a chained key-issuing process over a finite group of points in which the discrete logarithm problem applies, wherein an issuing user (Useri), who possesses an issuing user public value (Ui) and an issuing user private key (xi), provides to a successor user (User(i+i)) a successor user public value (U(i+1)) and a successor user private key (x(i+i)), and where the issuing user, except for a Certifying Authority (CA), was a successor user in a preceding step in the chained key-issuing process, and where the Certifying Authority acts as the first issuing user in the chained key-issuing process.

Abstract: Method and apparatus for calculating the modular multiplicative inverse of an element of a Galois Field GF(2n).

Abstract: A modular arithmetic method and microelectronic apparatus therefore, operative to perform a sequence of interleaved Montgomery type multiplications and squaring operations, involves performing a sequence of modular multiplications and squarings using only a single carry save adder. Each multiplication is operative to perform the equivalent of three natural integer multiplication operations using an anticipatory device to determine a Y0 value, such that a result is an exponentiation.

Abstract: A compact synchronous microelectronic peripheral machine for standard microprocessors with means for proper clocking and control, has as essential elements: three main subdivided, switched and clocked shift registers, B, S, and N; two only multiplexed serial/parallel multipliers; borrow detectors, ancillary subtractors and adders; delay registers and switching elements; all of which embody a totally integrated concurrent and synchronous process approach to modular multiplication, squaring, and exponentiation. A method for carrying out modular multiplication, wherein the multiplicand A, the multiplier B and the modul, N, comprise m characters of k bits each, the multiplier not being greater than the modulus, is also described, wherein the multiplicand can be much larger than the modulus. It is demonstrated how the device can be used as a large number processor in the normal field of numbers.

Abstract: A compact synchronous microelectronic peripheral machine for standard microprocessors with means for proper clocking and control, has as essential elements: three main subdivided, switched and docked shift registers, B, S, and N; two only multiplexed serial/parallel multipliers; borrow detectors, ancillary subtractors and adders; delay registers and switching elements; all of which embody a totally integrated concurrent and synchronous process approach to modular multiplication, squaring, and exponentiation. A method for carrying out modular multiplication, wherein the multiplicand A , the multiplier B and the modul, N, comprise m characters of k bits each, the multiplier not being greater than the modulus, is also described, wherein the multiplicand can be much larger than the modulus. It is demonstrated how the device can be used as a large number processor in the normal field of numbers.

Abstract: A Digital Signature Device includes hardware device for carrying out an operation AB2.sup.-n mod N and an operation AB mod N, and carrying out modular exponentiation and modular multiplication based on an operation AB2.sup.-n mod N and an operation AB mod N. A method of performing an operation AB2.sup.-n mod N, an operation AB mod N, modular exponentiation, and modular multiplication by using hardware device, such as electrical controller, feeder, and delay device, etc.

Abstract: In a method for the exponentiation in a finite field GF(2.sup.n) the squaring operation is carried out by constructing a vector, the components of which are in alternation the components of the vector to be squared and the number 0. An apparatus for exponentiation in a finite field GF(2.sup.n), is described.