Patents by Inventor Benjamin Butterfly William Vigoda

Benjamin Butterfly William Vigoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method for reducing errors in analog circuits while processing signals
    Patent number: 7788312
    Abstract: A method and apparatus processes signals in a set of analog circuit components of an analog circuit white enforcing a set of explicit constraints corresponding to a set of implicit constraints to reduce errors in output signals.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: August 31, 2010
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventor: Benjamin Butterfly William Vigoda
  • Apparatus and Method for Reducing Errors in Analog Circuits while Processing Signals
    Publication number: 20080174460
    Abstract: A method and apparatus processes signals in a set of analog circuit components of an analog circuit white enforcing a set of explicit constraints corresponding to a set of implicit constraints to reduce errors in output signals.
    Type: Application
    Filed: January 19, 2007
    Publication date: July 24, 2008
    Inventor: Benjamin Butterfly William Vigoda