Patents by Inventor Benjamin Chaffin

Benjamin Chaffin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070260907
    Abstract: A technique to modify a timer. More particularly, at least one embodiment of the invention relates to a technique to modify a timer value without the timer advancing by a significant amount.
    Type: Application
    Filed: May 2, 2006
    Publication date: November 8, 2007
    Inventors: Martin Dixon, Robert Greiner, Benjamin Chaffin
  • Publication number: 20050283660
    Abstract: A platform and method for secure handling of events in an isolated execution environment. A processor executing in isolated execution “IsoX” mode may leak data when an event occurs as a result of the event being handled in a traditional manner based on the exception vector. By defining a class of events to be handled in IsoX mode, and switching between a normal memory map and an IsoX memory map dynamically in response to receipt of an event of the class, data security may be maintained in the face of such events.
    Type: Application
    Filed: July 21, 2005
    Publication date: December 22, 2005
    Inventors: Francis McKeen, Lawrence Smith, Benjamin Chaffin, Michael Cornaby, Bryant Bigbee
  • Publication number: 20020129229
    Abstract: The use of a stack, in a microinstruction sequencer of a microprocessor, to redirect a sequence of microinstructions or to provide parameter passing is disclosed. In an embodiment the microinstruction sequencer stack comprises an array of memory cells and control logic and is coupled to receive data and control values from microinstruction sequencing logic and/or the microprocessor core. In another embodiment in accordance with the invention, a microprocessor includes a microinstruction sequencer including an array of memory cells dedicated to the microinstruction sequencer, an address multiplexer coupled to the array of memory cells, sequencing logic coupled to the address multiplexer and to the array of memory cells, and a microprocessor core unit coupled to the array of memory cells.
    Type: Application
    Filed: December 29, 2000
    Publication date: September 12, 2002
    Inventors: Michael Cornaby, Benjamin Chaffin, Lawrence O., III Smith