Abstract: A multijunction solar cell including an upper first solar subcell having a first band gap; a second solar subcell adjacent to the first solar subcell and having a second band gap smaller than the first band gap; a first graded interlayer adjacent to the second solar subcell; the first graded interlayer having a third band gap greater than the second band gap; and a third solar subcell adjacent to the first graded interlayer, the third subcell having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell. A second graded interlayer is provided adjacent to the third solar subcell; the second graded interlayer having a fifth band gap greater than the fourth band gap; and a lower fourth solar subcell is provided adjacent to the second graded interlayer, the lower fourth subcell having a sixth band gap smaller than the fourth band gap such that the fourth subcell is lattice mismatched with respect to the third subcell.

Abstract: A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell, the method including: providing a substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap and including a pseudomorphic window layer; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell, the graded interlayer having a third band gap greater than the second band gap; and forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second solar subcell.

Abstract: A multijunction solar cell including an upper first solar subcell having a first band gap; a middle second solar subcell adjacent to the first solar subcell and having a second band gap smaller than the first band gap and having a base layer and an adjacent emitter layer, wherein the other layer adjacent to the emitter layer has an index of refraction substantially equal to that of the emitter layer; a graded interlayer adjacent to the second solar having a third band gap greater than said second band gap; and a lower solar subcell adjacent to the interlayer, and having a fourth band gap smaller than the second band gap, the third subcell being lattice mismatched with respect to the second subcell.

Abstract: Disclosed is a lithium secondary battery comprising a cathode (C), an anode (A), a separator and an electrolyte, wherein the battery has a weight ratio (A/C) of anode active material (A) to cathode active material (C) per unit area of each electrode of between 0.44 and 0.70, and shows a charge cut-off voltage of between 4.35V and 4.6V. The high-voltage lithium secondary battery satisfies capacity balance by controlling the weight ratio (A/C) of anode active material (A) to cathode active material (C) per unit area of each electrode. Therefore, it is possible to significantly increase the available capacity and average discharge voltage of a battery using a lithium/cobalt-based cathode active material, which shows an available capacity of about 50% in a conventional 4.2V-battery. Additionally, it is possible to significantly improve battery safety under overcharge conditions, and thus to provide a high-voltage and high-capacity lithium secondary battery having excellent safety and long service life.

Abstract: Disclosed is a lithium secondary battery comprising a cathode (C), an anode (A), a separator and an electrolyte, wherein the electrolyte comprises: (a) a nitrile group-containing compound and (b) a compound having a reaction potential of 4.7V or higher. The lithium secondary battery can prevent the problems caused by a nitrile group-containing compound added to the electrolyte for the purpose of improving high-temperature cycle characteristics and safety (such problems as a battery swelling phenomenon and a drop in recovery capacity under high-temperature (>80° C.) storage conditions), by adding a fluorotoluene compound.

Abstract: A method of manufacturing a strained semiconductor substrate includes the steps of provide a Si substrate and depositing a strained Si1-xGex layer on the Si substrate. The Si substrate and strained Si1-xGex layer are subjected to rapid thermal annealing which forms a relaxed Si1-xGex layer on the Si substrate. The method further includes the steps of depositing a buffer Si1-xGex layer on the relaxed Si1-xGex layer, and depositing Si on the buffer Si1-xGex layer. The buffer Si1-xGex layer causes the deposited Si to form a strained Si layer on the buffer Si1-xGex layer with the combined layers forming the strained semiconductor substrate.