Patents by Inventor BENJAMIN D. POUST

BENJAMIN D. POUST has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9774067
    Abstract: A plasma power limiter fabricated using wafer-level fabrication techniques with other circuit elements. The power limiter includes a signal substrate having a first side and a second side, an input signal line formed on the first side, a signal transmission line formed on the second side and an output signal line formed on the first side. The power limiter also includes a ground substrate having a first side and a second side, and being bonded to the signal substrate to form a sealed cavity including an ionizable gas therebetween. The ground substrate includes a ground metal layer formed on the second side. A signal propagating on the input signal line at a power level greater than a threshold power level generates a voltage potential across the cavity that ionizes the gas and generates a plasma discharge, and limits power of the output signal coupled to the output signal line.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: September 26, 2017
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Benjamin D. Poust, Michael Conrad Battung, Dino Ferizovic, Patty P. Chang-Chien
  • Patent number: 9484284
    Abstract: A MMIC power amplifier circuit assembly comprised of a SiC substrate having a plurality of microchannels formed therein, where a diamond layer is provided within each of the microchannels. A plurality of GaN HEMT devices are provided on the substrate where each HEMT device is positioned directly opposite to a microchannel. A silicon manifold is coupled to the substrate and includes a plurality of micro-machined channels formed therein that include a jet impingement channel positioned directly adjacent each microchannel, a return channel directly positioned adjacent to each microchannel, a supply channel supplying a cooling fluid to the impingement channels and a return channel collecting heated cooling fluid from the supply channels so that an impingement jet is directed on to the diamond layer for removing heat generated by the HEMT devices.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: November 1, 2016
    Assignees: Northrop Grumman Systems Corporation, General Electric Company
    Inventors: Vincent Gambin, Benjamin D. Poust, Dino Ferizovic, Stanton E. Weaver, Gary D. Mandrusiak
  • Publication number: 20150244048
    Abstract: A plasma power limiter fabricated using wafer-level fabrication techniques with other circuit elements. The power limiter includes a signal substrate having a first side and a second side, an input signal line formed on the first side, a signal transmission line formed on the second side and an output signal line formed on the first side. The power limiter also includes a ground substrate having a first side and a second side, and being bonded to the signal substrate to form a sealed cavity including an ionizable gas therebetween. The ground substrate includes a ground metal layer formed on the second side. A signal propagating on the input signal line at a power level greater than a threshold power level generates a voltage potential across the cavity that ionizes the gas and generates a plasma discharge, and limits power of the output signal coupled to the output signal line.
    Type: Application
    Filed: May 11, 2015
    Publication date: August 27, 2015
    Inventors: BENJAMIN D. POUST, MICHAEL CONRAD BATTUNG, DINO FERIZOVIC, PATTY P. CHANG-CHIEN