Abstract: A digital FIR filter is provided that inputs a series of data samples x[0] . . . x[n] and generates a partial sum output PS[i], where i≦n. The partial sum output is a weighted version of the a difference between a partial sum of the previous i−1 data samples, PS[i−1], and the current data sample x[n] added to the current data sample x[n]. The filter includes a plurality of weighting stages. Each weighting stage includes a first adder for subtracting the current data sample x[n] from the previous partial sum PS[i−1], a multiplier that multiplies the difference by a weighting coefficient, and a second adder that sums the weighted difference with the current data sample. The filter also includes a plurality of delay elements, each of which inputs a partial sum and imposes a unit delay on the partial sum before supplying it to a weighting stage.

Abstract: One disclosed embodiment comprises a vertical scaler receiving a first number of video lines at a first frequency. The vertical scaler outputs a second number of video lines at the first frequency. A FIFO has as an input from the vertical scaler the second number of video lines at the first frequency. The FIFO outputs the second number of video lines at a second frequency. Another disclosed embodiment further comprises a modulator/timing generator having as an input from the FIFO the second number of video lines at the second frequency. The second number of video lines can be in a first video format. The first video format can be a high resolution video format. The modulator/timing generator converts the second number of video lines in the first video format into a second video format. The second video format can be a low resolution video format.

Abstract: A signal processing system and process for digitally filtering a single tone digital signal is disclosed. The system includes a single tone signal generator, which may or may not perform frequency modulation. The single tone signal generator receives an input signal and generates a frequency indicator which is used internally by the single tone signal generator and is also communicated to a direct realization filter. The direct realization filter uses the frequency indicator to generate a phase offset indicator, which is communicated back to the single tone signal generator. The single tone signal generator uses the frequency indicator and the phase offset indicator to generate a phase-adjusted single tone signal. The direct realization filter generates a filter gain and multiplies the single tone signal with the filter gain to produce a filtered single tone signal.

Abstract: System and method for processing HDTV format video signals have been disclosed. A disclosed embodiment comprises a HDTV timing generator having as inputs a vertical sync and a horizontal sync. The HDTV timing generator outputs a digital HD level signal. The disclosed embodiment further comprises a DAC interface. The DAC interface can include an encoder channel, or more than one encoder channel. The encoder channel can receive a digital HD level signal, a SCART level signal, an NTSC level signal, a PAL level signal, and a SECAM level signal. The encoder channel can further receive a HDTV format data input, a SCART format data input, an NTSC format data input, a PAL format data input, and a SECAM format data input. The output of the DAC interface can be coupled to a DAC which in turn generates an output suitable for display on a monitor.