Patents by Inventor Benjamin Haugestuen

Benjamin Haugestuen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7644331
    Abstract: A method and apparatus is presented for debugging and testing a memory controller. In one embodiment, a testing interface is presented for performing stuck-at testing. In a second embodiment, a testing interface is presented for observing clock timing in a memory controller.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: January 5, 2010
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventor: Benjamin Haugestuen
  • Patent number: 7626435
    Abstract: A delay line architecture is presented. In one embodiment, the delay line is used to introduce delay compensation into a circuit design at the top level of the circuit design.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: December 1, 2009
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventor: Benjamin Haugestuen
  • Publication number: 20070024630
    Abstract: A method and apparatus is presented for debugging and testing a memory controller. In one embodiment, a testing interface is presented for performing stuck-at testing. In a second embodiment, a testing interface is presented for observing clock timing in a memory controller.
    Type: Application
    Filed: July 27, 2005
    Publication date: February 1, 2007
    Inventor: Benjamin Haugestuen
  • Publication number: 20070024339
    Abstract: A delay line architecture is presented. In one embodiment, the delay line is used to introduce delay compensation into a circuit design at the top level of the circuit design.
    Type: Application
    Filed: July 27, 2005
    Publication date: February 1, 2007
    Inventor: Benjamin Haugestuen