Abstract: An apparatus and method are disclosed with some embodiments including an analog and time to digital converter (ATDC) including a receiver, the receiver for receiving an analog channel input for conversion to a digital data, the digital data having at least one bit, and a defined absolute reference time stamp, the defined absolute reference time stamp representing an absolute reference time associated with conversion of the analog channel input to the digital data and an analog-to-digital converter, the converter converting the analog channel input to the digital data.

Abstract: An apparatus and method are disclosed with some embodiments including an analog and time to digital converter (ATDC) including a receiver, the receiver for receiving an analog channel input for conversion to a digital data, the digital data having at least one bit, and a defined absolute reference time stamp, the defined absolute reference time stamp representing an absolute reference time associated with conversion of the analog channel input to the digital data and an analog-to-digital converter, the converter converting the analog channel input to the digital data.

Abstract: An apparatus and method are disclosed with some embodiments including an analog and time to digital converter (ATDC) including a receiver, the receiver for receiving an analog channel input for conversion to a digital data, the digital data having at least one bit, and a defined absolute reference time stamp, the defined absolute reference time stamp representing an absolute reference time associated with conversion of the analog channel input to the digital data and an analog-to-digital converter, the converter converting the analog channel input to the digital data.

Abstract: A reference time generator including a first clock source including a reference synthesizer and cesium atomic clock configured to produce a cesium reference signal and a cesium QOT metric, a second clock source including a reference synthesizer and rubidium atomic clock configured to produce a rubidium reference signal and a rubidium QOT metric, and a circuit for selecting from the clock sources one reference signal based on the best QOT metric.

Abstract: A reference time generator including a first clock source including a reference synthesizer and cesium atomic clock configured to produce a cesium reference signal and a cesium QOT metric, a second clock source including a reference synthesizer and rubidium atomic clock configured to produce a rubidium reference signal and a rubidium QOT metric, and a circuit for selecting from the clock sources one reference signal based on the best QOT metric.

Abstract: An apparatus and method is disclosed with embodiments of a: 1. digital to analog and reference time converter; 2. analog and reference time to digital converter; 3. Sheahan non-linear time-varying, analog and digital control system; and 4. Sheahan Communication Channel are described in detail herein. Some embodiments use time stamp having 72 bits of time data sufficient to identify each clock pulse of a 9.192631770 GHz clock signal plus an additional 8 bits representing 28=256 interpolated clock phases in order reach a resolution of approximately 0.425 picoseconds per clock phase. Thus an 80 bit time stamp is generated and used as described herein.

Abstract: An apparatus and method is disclosed with embodiments of a: 1. digital to analog and reference time converter; 2. analog and reference time to digital converter; 3. Sheahan non-linear time-varying, analog and digital control system; and 4. Sheahan Communication Channel are described in detail herein. Some embodiments use time stamp having 72 bits of time data sufficient to identify each clock pulse of a 9.192631770 GHz clock signal plus an additional 8 bits representing 28=256 interpolated clock phases in order reach a resolution of approximately 0.425 picoseconds per clock phase. Thus an 80 bit time stamp is generated and used as described herein.

Abstract: An apparatus for shifting a received signal at a first reference level to an output signal at a second reference level; the received signal including information-indicating signal values; includes: (a) an input locus for receiving the received signal; (b) an output locus for presenting the output signal; (c) a first signal-handling circuit coupled with the input locus and with the output locus and setting the second reference level at the output locus; and (d) a second signal-handling circuit coupled with the input locus and with the first signal-handling circuit; the first signal-handling circuit and the second signal-handling circuit cooperating to convey the information-indicating signal values from the input locus to the output locus.

Abstract: A phase locked loop system (52) and method is used in a synchronously sampled data channel (10) of a disk drive mass storage system (30).