Patents by Inventor Benjamin James Stembridge

Benjamin James Stembridge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7940549
    Abstract: The configurations of a DRAM positive wordline voltage compensation device and a voltage compensating method thereof are provided in the present invention. The proposed device includes a comparator having a first input terminal receiving a positive wordline voltage feedback signal, a second input terminal receiving a compensating reference of array device threshold voltage and an output terminal generating a first enable signal, an oscillator receiving the first enable signal and generating an oscillating signal when the first enable signal is active and a charge pump having a first input terminal receiving a second enable signal, a second input terminal receiving the oscillating signal and an output terminal generating a positive wordline voltage being a sum of a bitline high voltage, an array device threshold voltage and a voltage margin.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: May 10, 2011
    Assignee: Nanya Technology Corp.
    Inventors: Benjamin James Stembridge, Ryan Andrew Jurasek, Richard Michael Parent
  • Publication number: 20110080771
    Abstract: The configurations of a DRAM positive wordline voltage compensation device and a voltage compensating method thereof are provided in the present invention. The proposed device includes a comparator having a first input terminal receiving a positive wordline voltage feedback signal, a second input terminal receiving a compensating reference of array device threshold voltage and an output terminal generating a first enable signal, an oscillator receiving the first enable signal and generating an oscillating signal when the first enable signal is active and a charge pump having a first input terminal receiving a second enable signal, a second input terminal receiving the oscillating signal and an output terminal generating a positive wordline voltage being a sum of a bitline high voltage, an array device threshold voltage and a voltage margin.
    Type: Application
    Filed: October 5, 2009
    Publication date: April 7, 2011
    Applicant: NANYA TECHNOLOGY CORP.
    Inventors: Benjamin James STEMBRIDGE, Ryan Andrew JURASEK, Richard Michael PARENT