Abstract: A wireless communication device includes an antenna array with multiple antenna elements, an array of power amplifiers, and an array of phase shifters. Each antenna element is coupled to a power amplifier and a phase shifter. The device also includes transmitter circuitry coupled to the antenna array to encode a constant amplitude signal, which includes a power amplifier enable code to indicate which power amplifiers are to run in a subsequent data sample and a beam direction code to control beam direction of each phase shifter of the array of phase shifters in the subsequent data sample. The constant amplitude signal is then provided to the array of antenna elements and amplitude and phase modulation is combined over an air interface into a composite modulated signal.

Abstract: A wireless communication device can include chains of circuitry, with at least one chain being a chain of transmitter circuitry to generate output radio frequency (RF) signals using baseband signals and at least one chain of receiver circuitry configured to receive RF signals. At least one chain can include a plurality of circuit blocks, a circuit block including at least one of oscillator circuitry, clocking circuitry, and phased lock loop (PLL) circuitry. The apparatus can include interconnect circuitry configured to couple one of the plurality of circuit blocks to a respective chain. Other systems, methods and apparatuses are described.

Abstract: Disclosed herein are integrated circuit (IC) packages, antenna boards, antenna modules, and communication devices (e.g., for millimeter wave communications). For example, in some embodiments, an antenna module may include: a logic die; a radio frequency front-end (RFFE) die in electrical communication with the logic die; and an antenna patch, wherein the RFFE die is closer to the antenna patch than the logic die is to the antenna patch.

Abstract: A circuit for suppressing undesired sub-harmonics includes a plurality of mixers, wherein the plurality of mixers are connected in parallel; a plurality of local oscillator signals (LO), wherein each of the plurality of LOs is associated with one of the plurality of mixers; an input to receive a plurality of phases of a driving clock, wherein each of the plurality of phases is a sub-harmonic of the driving clock, and wherein each phase of the driving clock is distributed to one of the plurality of mixers; wherein the plurality of mixers are configured to suppress one or more of the plurality of phases of the driving clock and amplify a desired phase of the driving clock.

Abstract: A wireless communication device can include an oscillator circuit. The oscillator circuit can include an oscillator and measurement circuitry coupled to the oscillator. The measurement circuitry can receive an output signal of the oscillator and measure oscillator error by comparing the output signal of the oscillator to a nominal frequency for an amount of time. The oscillator circuit can further include adjustment circuitry to adjust an oscillator frequency of the oscillator based on the measured oscillator error.

Abstract: A phased array may include a clock stage configured to generate shifted clock signals. Each shifted clock signal may include a different phase. The phased array may also include a beamforming stage configured to generate a beamformed signal that includes a beam formed in a direction based on summed signals. In addition, the phased array may include slices. Each slice may include a filter stage and a feedback stage. The filter stage may be configured to generate a corresponding summed signal by filtering a portion of blocker and noise interference in a corresponding receive signal based on blocking signals and the shifted clock signals. The feedback stage may be configured to generate the blocking signals based on the shifted clock signals and the corresponding summed signal. The blocking signals may be representative of the blocker and noise interference in the corresponding receive signal.

Abstract: Disclosed herein are integrated circuit (IC) packages, antenna boards, antenna modules, and communication devices (e.g., for millimeter wave communications). For example, in some embodiments, an antenna module may include: a logic die; a radio frequency front-end (RFFE) die in electrical communication with the logic die; and an antenna patch, wherein the RFFE die is closer to the antenna patch than the logic die is to the antenna patch.

Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.

Abstract: Disclosed herein are integrated circuit (IC) packages, antenna boards, antenna modules, and communication devices (e.g., for millimeter wave communications). For example, in some embodiments, an antenna module may include: a logic die; a radio frequency front-end (RFFE) die in electrical communication with the logic die; and an antenna patch, wherein the RFFE die is closer to the antenna patch than the logic die is to the antenna patch.

Abstract: A digital clock multiplier (DCM) circuit including: a plurality of power amplifier (PA) rows, wherein each PA row comprises a plurality of cascade switched capacitor power amplifiers (SCPA) unit cells configured to: receive a phase shift of a driving clock phase; and one or more processors configured to: disable of one or more of the plurality of cascade SCPA unit cells based on a frequency of the phase shift; generate an output signal for each of the cascade SCPA unit cells; and combine the output signal for each of the cascade SCPA unit cells to generate an PA row output signal.

Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.

Abstract: An apparatus for controlling an equalizer is provided. The apparatus comprises interface circuitry configured to receive at least one of an input signal and an output signal of the equalizer. The apparatus further comprises processing circuitry configured to determine at least one signal metric based on the at least one of the input signal and the output signal of the equalizer, select an operating mode of the equalizer from a plurality of different operating modes based on the determined signal metric, and control the equalizer to operate in the selected operating mode.

Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.

Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.

Abstract: Disclosed herein are integrated circuit (IC) packages, antenna boards, antenna modules, and communication devices (e.g., for millimeter wave communications). For example, in some embodiments, an antenna module may include: a logic die; a radio frequency front-end (RFFE) die in electrical communication with the logic die; and an antenna patch, wherein the RFFE die is closer to the antenna patch than the logic die is to the antenna patch.

Abstract: Disclosed herein are integrated circuit (IC) packages, antenna boards, antenna modules, and communication devices (e.g., for millimeter wave communications). For example, in some embodiments, an antenna module may include: a logic die; a radio frequency front-end (RFFE) die in electrical communication with the logic die; and an antenna patch, wherein the RFFE die is closer to the antenna patch than the logic die is to the antenna patch.

Abstract: A wireless communication device includes an antenna array with multiple antenna elements, an array of power amplifiers, and an array of phase shifters. Each antenna element is coupled to a power amplifier and a phase shifter. The device also includes transmitter circuitry coupled to the antenna array to encode a constant amplitude signal, which includes a power amplifier enable code to indicate which power amplifiers are to run in a subsequent data sample and a beam direction code to control beam direction of each phase shifter of the array of phase shifters in the subsequent data sample. The constant amplitude signal is then provided to the array of antenna elements and amplitude and phase modulation is combined over an air interface into a composite modulated signal.

Abstract: A wireless communication device can include an antenna array and processing circuitry coupled to the antenna array to segment antenna elements of an antenna array into a configurable plurality of groups of antenna elements. The circuitry can also activate analog beamforming for at least one group of the plurality of groups of antenna elements. Subsequent to enabling analog beamforming, the processing circuitry can configure digital beamforming for the at !east one group based on a criterion.

Abstract: A wireless communication device can include an oscillator circuit. The oscillator circuit can include an oscillator and measurement circuitry coupled to the oscillator. The measurement circuitry can receive an output signal of the oscillator and measure oscillator error by comparing the output signal of the oscillator to a nominal frequency for an amount of time. The oscillator circuit can further include adjustment circuitry to adjust an oscillator frequency of the oscillator based on the measured oscillator error.

Abstract: A wireless communication device can include chains of circuitry, with at least one chain being a chain of transmitter circuitry to generate output radio frequency (RF) signals using baseband signals and at least one chain of receiver circuitry configured to receive RF signals. At least one chain can include a plurality of circuit blocks, a circuit block including at least one of oscillator circuitry, clocking circuitry, and phased lock loop (PLL) circuitry. The apparatus can include interconnect circuitry configured to couple one of the plurality of circuit blocks to a respective chain. Other systems, methods and apparatuses are described.