Patents by Inventor Benjamin Johnston Sloan, Jr.

Benjamin Johnston Sloan, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4075039
    Abstract: An integrated injection logic circuit having improved operating characteristics is provided, comprising an inverted, multiple-collector transistor having base regions characterized by a central active portion surrounded by a heavily-doped extrinsic base region to which the base contact is made. Using ion implantation, each active portion of the base region is provided with a dopant concentration which increases with distance from the collector junction, thereby increasing transistor speed and gain. The extrinsic portion of the base reduces series resistance for multicollector transistors, provides heavy doping at the surface for good ohmic base contacts; and most importantly, defines the active emitter-base regions. The effective or "active" collector-to-emitter area ratio of the device is improved by more than 50:1 compared with prior devices.
    Type: Grant
    Filed: August 30, 1976
    Date of Patent: February 21, 1978
    Assignee: Texas Instruments Incorporated
    Inventor: Benjamin Johnston Sloan, Jr.
  • Patent number: 3938176
    Abstract: Disclosed is a method of fabricating dielectrically isolated semiconductor components of an integrated circuit, and the semiconductor component formed by this method, each component having a plurality of high conductivity regions extending from the interior of said component to the surface thereof to provide high conductivity paths to selected semiconductor regions of the component.
    Type: Grant
    Filed: September 24, 1973
    Date of Patent: February 10, 1976
    Assignee: Texas Instruments Incorporated
    Inventor: Benjamin Johnston Sloan, Jr.
  • Patent number: 3933528
    Abstract: A self-aligning process for fabrication of integrated circuits utilizing ion implantation to effect doping. A composed masking technique is used to define self-aligned areas in a silicon oxide layer for definition of isolation, base, resistor and collector contact regions. Only two oxide removal steps are required for isolation through emitter process steps, and the process uses the silicon oxide layer and photoresist material for implantation masking. Formation of the emitter region by ion implantation and by diffusion are described.
    Type: Grant
    Filed: July 2, 1974
    Date of Patent: January 20, 1976
    Assignee: Texas Instruments Incorporated
    Inventor: Benjamin Johnston Sloan, Jr.