Patents by Inventor Benjamin Koon Pan Chan

Benjamin Koon Pan Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11443051
    Abstract: A computer vision processor in an image cluster defines a fenced memory region (FMR) that controls access to image data stored in a first portion of a trusted memory region (TMR). The computer vision processor receives FMR requests from an application implemented in a processing cluster. The FMR requests are to access the image data in the first portion of the TMR. The computer vision processor selectively allows the requesting application to access the image data. In some cases, the computer vision processor acquires the image data and stores the image data in the first portion of the TMR, such as buffers in the TMR. A data fabric selectively permits the image processing application to access the data stored in the TMR based on whether the image cluster has opened or closed the FMR for the portion of the TMR.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: September 13, 2022
    Assignees: Advanced Micro Devices, Inc., ATI TECHNOLOGIES ULC
    Inventors: Benjamin Koon Pan Chan, William Lloyd Atkinson, Tung Chuen Kwong, Guhan Krishnan
  • Publication number: 20220207783
    Abstract: Methods and devices are provided for processing image data on a sub-frame portion basis using layers of a convolutional neural network. The processing device comprises memory and a processor. The processor is configured to receive frames of image data comprising sub-frame portions, schedule a first sub-frame portion of a first frame to be processed by a first layer of the convolutional neural network when the first sub-frame portion is available for processing, process the first sub-frame portion by the first layer and continue the processing of the first sub-frame portion by the first layer when it is determined that there is sufficient image data available for the first layer to continue processing of the first sub-frame portion. Processing on a sub-frame portion basis continues for subsequent layers such that processing by a layer can begin as soon as sufficient data is available for the layer.
    Type: Application
    Filed: December 30, 2020
    Publication date: June 30, 2022
    Applicants: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Tung Chuen Kwong, David Porpino Sobreira Marques, King Chiu Tam, Shilpa Rajagopalan, Benjamin Koon Pan Chan, Vickie Youmin Wu
  • Publication number: 20220100634
    Abstract: Systems, apparatuses, and methods for implementing a safety monitor framework for a safety-critical computer vision (CV) application are disclosed. A system includes a safety-critical CV application, a safety monitor, and a CV accelerator engine. The safety monitor receives an input image, test data, and a CV graph from the safety-critical CV application. The safety monitor generates a modified image by adding additional objects outside of the input image. The safety monitor provides the modified image and CV graph to the CV accelerator which processes the modified image and provides outputs to the safety monitor. The safety monitor determines the likelihood of erroneous processing of the original input image by comparing the outputs for the additional objects with a known good result. The safety monitor complements the overall fault coverage of the CV accelerator engine and covers faults only observable at the level of the CV graph.
    Type: Application
    Filed: December 10, 2021
    Publication date: March 31, 2022
    Inventors: Tung Chuen Kwong, Benjamin Koon Pan Chan, Clarence Ip, Meghana Manjunatha
  • Patent number: 11210199
    Abstract: Systems, apparatuses, and methods for implementing a safety monitor framework for a safety-critical computer vision (CV) application are disclosed. A system includes a safety-critical CV application, a safety monitor, and a CV accelerator engine. The safety monitor receives an input image, test data, and a CV graph from the safety-critical CV application. The safety monitor generates a modified image by adding additional objects outside of the input image. The safety monitor provides the modified image and CV graph to the CV accelerator which processes the modified image and provides outputs to the safety monitor. The safety monitor determines the likelihood of erroneous processing of the original input image by comparing the outputs for the additional objects with a known good result. The safety monitor complements the overall fault coverage of the CV accelerator engine and covers faults only observable at the level of the CV graph.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: December 28, 2021
    Assignee: ATI Technologies ULC
    Inventors: Tung Chuen Kwong, Benjamin Koon Pan Chan, Clarence Ip, Meghana Manjunatha
  • Publication number: 20210383596
    Abstract: Systems, apparatuses, and methods for performing real-time video rendering with performance guaranteed power management are disclosed. A system includes at least a software driver, a power management unit, and a plurality of processing elements for performing rendering tasks. The system receives inputs which correspond to rendering tasks which need to be performed. The software driver monitors the inputs that are received and the number of rendering tasks to which they correspond. The software driver also monitors the amount of time remaining until the next video synchronization signal. The software driver determines which performance setting will minimize power consumption while still allowing enough time to finish the rendering tasks for the current frame before the next video synchronization signal. Then, the software driver causes the power management unit to provide this performance setting to the plurality of processing elements as they perform the rendering tasks for the current frame.
    Type: Application
    Filed: August 20, 2021
    Publication date: December 9, 2021
    Inventors: Benjamin Koon Pan Chan, William Lloyd Atkinson, Clarence Ip, Tung Chuen Kwong
  • Patent number: 11100698
    Abstract: Systems, apparatuses, and methods for performing real-time video rendering with performance guaranteed power management are disclosed. A system includes at least a software driver, a power management unit, and a plurality of processing elements for performing rendering tasks. The system receives inputs which correspond to rendering tasks which need to be performed. The software driver monitors the inputs that are received and the number of rendering tasks to which they correspond. The software driver also monitors the amount of time remaining until the next video synchronization signal. The software driver determines which performance setting will minimize power consumption while still allowing enough time to finish the rendering tasks for the current frame before the next video synchronization signal. Then, the software driver causes the power management unit to provide this performance setting to the plurality of processing elements as they perform the rendering tasks for the current frame.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: August 24, 2021
    Assignee: ATI Technologies ULC
    Inventors: Benjamin Koon Pan Chan, William Lloyd Atkinson, Clarence Ip, Tung Chuen Kwong
  • Publication number: 20210081328
    Abstract: Systems, apparatuses, and methods for implementing a unified kernel virtual address space for heterogeneous computing are disclosed. A system includes at least a first subsystem running a first kernel, an input/output memory management unit (IOMMU), and a second subsystem running a second kernel. In order to share a memory buffer between the two subsystems, the first subsystem allocates a block of memory in part of the system memory controlled by the first subsystem. A first mapping is created from a first logical address of the kernel address space of the first subsystem to the block of memory. Then, the IOMMU creates a second mapping to map the physical address of that block of memory from a second logical address of the kernel address space of the second subsystem. These mappings allow the first and second subsystems to share buffer pointers which reference the block of memory.
    Type: Application
    Filed: November 25, 2020
    Publication date: March 18, 2021
    Inventors: Tung Chuen Kwong, Benjamin Koon Pan Chan, William Lloyd Atkinson
  • Publication number: 20200410747
    Abstract: Systems, apparatuses, and methods for performing real-time video rendering with performance guaranteed power management are disclosed. A system includes at least a software driver, a power management unit, and a plurality of processing elements for performing rendering tasks. The system receives inputs which correspond to rendering tasks which need to be performed. The software driver monitors the inputs that are received and the number of rendering tasks to which they correspond. The software driver also monitors the amount of time remaining until the next video synchronization signal. The software driver determines which performance setting will minimize power consumption while still allowing enough time to finish the rendering tasks for the current frame before the next video synchronization signal. Then, the software driver causes the power management unit to provide this performance setting to the plurality of processing elements as they perform the rendering tasks for the current frame.
    Type: Application
    Filed: June 28, 2019
    Publication date: December 31, 2020
    Inventors: Benjamin Koon Pan Chan, William Lloyd Atkinson, Clarence Ip, Tung Chuen Kwong
  • Publication number: 20200409773
    Abstract: Systems, apparatuses, and methods for implementing a safety monitor framework for a safety-critical graphics processing unit (GPU) compute application are disclosed. A system includes a safety-critical GPU compute application, a safety monitor, and a GPU. The safety monitor receives a compute grid, test vectors, and a compute kernel from the safety-critical GPU compute application. The safety monitor generates a modified compute grid by adding extra tiles to the original compute grid, with the extra tiles generated based on the test vectors. The safety monitor provides the modified compute grid and compute kernel to the GPU for processing. The safety monitor determines the likelihood of erroneous processing of the original compute grid by comparing the actual results for the extra tiles with known good results. The safety monitor complements the overall fault coverage of the GPU hardware and covers faults only observable at the application programming interface (API) level.
    Type: Application
    Filed: June 28, 2019
    Publication date: December 31, 2020
    Inventors: Tung Chuen Kwong, Clarence Ip, Benjamin Koon Pan Chan, Edward Lee Kim-Koon, Meghana Manjunatha
  • Publication number: 20200380383
    Abstract: Systems, apparatuses, and methods for implementing a safety monitor framework for a safety-critical inference application are disclosed. A system includes a safety-critical inference application, a safety monitor, and an inference accelerator engine. The safety monitor receives an input image, test data, and a neural network specification from the safety-critical inference application. The safety monitor generates a modified image by adding additional objects outside of the input image. The safety monitor provides the modified image and neural network specification to the inference accelerator engine which processes the modified image and provides outputs to the safety monitor. The safety monitor determines the likelihood of erroneous processing of the original input image by comparing the outputs for the additional objects with a known good result. The safety monitor complements the overall fault coverage of the inference accelerator engine and covers faults only observable at the network level.
    Type: Application
    Filed: May 28, 2019
    Publication date: December 3, 2020
    Inventors: Tung Chuen Kwong, Benjamin Koon Pan Chan, David Porpino Sobreira Marques, Clarence Ip, Hung Wilson Yu
  • Publication number: 20200379877
    Abstract: Systems, apparatuses, and methods for implementing a safety monitor framework for a safety-critical computer vision (CV) application are disclosed. A system includes a safety-critical CV application, a safety monitor, and a CV accelerator engine. The safety monitor receives an input image, test data, and a CV graph from the safety-critical CV application. The safety monitor generates a modified image by adding additional objects outside of the input image. The safety monitor provides the modified image and CV graph to the CV accelerator which processes the modified image and provides outputs to the safety monitor. The safety monitor determines the likelihood of erroneous processing of the original input image by comparing the outputs for the additional objects with a known good result. The safety monitor complements the overall fault coverage of the CV accelerator engine and covers faults only observable at the level of the CV graph.
    Type: Application
    Filed: May 31, 2019
    Publication date: December 3, 2020
    Inventors: Tung Chuen Kwong, Benjamin Koon Pan Chan, Clarence Ip, Meghana Manjunatha
  • Patent number: 10853263
    Abstract: Systems, apparatuses, and methods for implementing a unified kernel virtual address space for heterogeneous computing are disclosed. A system includes at least a first subsystem running a first kernel, an input/output memory management unit (IOMMU), and a second subsystem running a second kernel. In order to share a memory buffer between the two subsystems, the first subsystem allocates a block of memory in part of the system memory controlled by the first subsystem. A first mapping is created from a first logical address of the kernel address space of the first subsystem to the block of memory. Then, the IOMMU creates a second mapping to map the physical address of that block of memory from a second logical address of the kernel address space of the second subsystem. These mappings allow the first and second subsystems to share buffer pointers which reference the block of memory.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: December 1, 2020
    Assignee: ATI Technologies ULC
    Inventors: Tung Chuen Kwong, Benjamin Koon Pan Chan, William Lloyd Atkinson
  • Patent number: 10824436
    Abstract: A hybrid co-processing system including both complex instruction set computer (CISC) architecture-based processing clusters and reduced instruction set computer (RISC) architecture-based processing clusters includes a parser to derive from a hardware configuration specific to the CISC architecture, such as an ACPI table, a device tree specific to the RISC architecture for booting. The hardware configuration information indicated by the device tree is specific to the RISC architecture, and in different cases includes more, less, or revised information than a corresponding ACPI table for the same hybrid co-processing system.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: November 3, 2020
    Assignee: ATI TECHNOLOGIES ULC
    Inventors: Benjamin Koon Pan Chan, William Lloyd Atkinson
  • Publication number: 20200202027
    Abstract: A computer vision processor in an image cluster defines a fenced memory region (FMR) that controls access to image data stored in a first portion of a trusted memory region (TMR). The computer vision processor receives FMR requests from an application implemented in a processing cluster. The FMR requests are to access the image data in the first portion of the TMR. The computer vision processor selectively allows the requesting application to access the image data. In some cases, the computer vision processor acquires the image data and stores the image data in the first portion of the TMR, such as buffers in the TMR. A data fabric selectively permits the image processing application to access the data stored in the TMR based on whether the image cluster has opened or closed the FMR for the portion of the TMR.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 25, 2020
    Inventors: Benjamin Koon Pan CHAN, William Lloyd ATKINSON, Tung Chuen KWONG, Guhan Krishnan
  • Publication number: 20200192679
    Abstract: A hybrid co-processing system including both complex instruction set computer (CISC) architecture-based processing clusters and reduced instruction set computer (RISC) architecture-based processing clusters includes a parser to derive from a hardware configuration specific to the CISC architecture, such as an ACPI table, a device tree specific to the RISC architecture for booting. The hardware configuration information indicated by the device tree is specific to the RISC architecture, and in different cases includes more, less, or revised information than a corresponding ACPI table for the same hybrid co-processing system.
    Type: Application
    Filed: December 13, 2018
    Publication date: June 18, 2020
    Inventors: Benjamin Koon Pan CHAN, William Lloyd ATKINSON
  • Patent number: 10382617
    Abstract: In an aspect, a user equipment (UE) is positioned within a driver operation zone of a vehicle, one or more UE-based user interfaces (UIs) are restricted and forwarded to a vehicle-based UI controller to permit access to the one or more UE-based features via a vehicle-based UI. In another aspect, the UE in the driver operation zone is engaged in hands-free speakerphone mode via a vehicle audio system of the vehicle, and an attempt to transition the UE to handset-based audio mode is blocked. In another aspect, when a handset-based audio capture and/or playback attempt of the UE is detected, the UE interacts with a vehicle audio system to temporarily reduce volume being output by one or more proximal speakers. In another aspect, the UE streams media to a media presentation device in its own zone or another zone of the vehicle for presentation thereon.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: August 13, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: William Lloyd Atkinson, Tung Chuen Kwong, Benjamin Koon Pan Chan, Henry Hing Law, Wilson Hung Yu
  • Patent number: 10055867
    Abstract: This disclosure describes methods, techniques, devices, and apparatuses for graphics and display processing for light field projection displays. In some examples, this disclosure describes a projection display system capable of rendering and displaying multiple annotations at the same time. An annotation is any information (e.g., texts, signs, directions, logos, phone numbers, etc.) that may be displayed. In one example, this disclosure proposes techniques for rendering and displaying multiple annotations at the same time at multiple different focal lengths.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: August 21, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Henry Hing Law, Tung Chuen Kwong, Benjamin Koon Pan Chan, William Lloyd Atkinson, Wilson Hung Yu
  • Patent number: 9813666
    Abstract: Systems and methods for reducing the bandwidth required to transmit video streams related to faces re described herein. In some aspects, contour information from face recognition technology is captured at a transmitting device and sent to a receiving device. The contour information may be used to reconstruct the face at the receiving device without the need to send an entire video frame of the face.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: November 7, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Henry Hing Law, Tung Chuen Kwong, Benjamin Koon Pan Chan, Yugang Zhou, Wilson Hung Yu
  • Publication number: 20170309049
    Abstract: This disclosure describes methods, techniques, devices, and apparatuses for graphics and display processing for light field projection displays. In some examples, this disclosure describes a projection display system capable of rendering and displaying multiple annotations at the same time. An annotation is any information (e.g., texts, signs, directions, logos, phone numbers, etc.) that may be displayed. In one example, this disclosure proposes techniques for rendering and displaying multiple annotations at the same time at multiple different focal lengths.
    Type: Application
    Filed: April 25, 2016
    Publication date: October 26, 2017
    Inventors: Henry Hing Law, Tung Chuen Kwong, Benjamin Koon Pan Chan, William Lloyd Atkinson, Wilson Hung Yu
  • Patent number: 9728166
    Abstract: A software application executing on at least one processor may output a video at a frame rate for display at a display device. The at least one processor may synchronize a refresh rate of the display device displaying the video to the frame rate of the video. In response to detecting a potential delay in displaying, at the display device, a frame of the video to be output by the software application, the at least one processor may time-shift at least one of: compositing of the frame and refreshing of the display device to mitigate the potential delay in displaying, at the display device, the frame of the video to be output by the software application.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: August 8, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Henry Hing Law, Tung Chuen Kwong, Benjamin Koon Pan Chan, William Lloyd Atkinson, Wilson Hung Yu