Patents by Inventor Benjamin W. BOYER

Benjamin W. BOYER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10325108
    Abstract: In one embodiment, a system comprises a processor to, in response to a determination that a write command is suspect, identify a logical address associated with the write command; and send a checkpoint command identifying the logical address to a storage device to preserve data stored in the storage device at a physical address associated with the logical address.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: June 18, 2019
    Assignee: Intel Corporation
    Inventors: Xiaoning Li, Ravi L. Sahita, Benjamin W. Boyer, Sanjeev Trika, Adrian Pearson
  • Publication number: 20180189508
    Abstract: In one embodiment, a system comprises a processor to, in response to a determination that a write command is suspect, identify a logical address associated with the write command; and send a checkpoint command identifying the logical address to a storage device to preserve data stored in the storage device at a physical address associated with the logical address.
    Type: Application
    Filed: December 30, 2016
    Publication date: July 5, 2018
    Inventors: Xiaoning Li, Ravi L. Sahita, Benjamin W. Boyer, Sanjeev Trika, Adrian Pearson
  • Publication number: 20180096143
    Abstract: According to some embodiments an electronic processing system may include a processor, memory coupled to the processor, and security code stored on the memory which when executed by the processor is to provide a trusted execution environment. A storage system may be coupled to the processor from outside of the trusted execution environment. The storage system may include a persistent storage media, a storage controller coupled to the persistent storage media, operating system code stored on the persistent storage media which when executed by the processor is to manage a file system for the electronic processing system, and storage controller code stored on the persistent storage media which when executed by the storage controller is to provide a transport layer between the file system and the persistent storage media. A sideband interface may be coupled between the storage system and the trusted execution environment bypassing the transport layer and the file system.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 5, 2018
    Inventors: Li Xiaoning, Ravi L. Sahita, Benjamin W. Boyer, Sanjeev N. Trika
  • Patent number: 9671971
    Abstract: Provided are a method, system, and computer readable storage medium for managing access to a storage device. A logical-to-physical mapping indicates for each logical address a physical address in the storage device having current data for the logical address and version information indicating whether there is a prior version of data for the logical address. In response to the logical-to-physical mapping indicating that there is no prior version of the data for a target logical address of a write, including information on the target physical address and the physical address indicated in the logical-to-physical mapping in checkpoint information. The version information for the target logical address is updated to indicate that there is a prior version of data. Data for the write is written to a target physical address. The logical-to-physical mapping for the target logical address is updated to indicate the target physical address.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: June 6, 2017
    Assignee: INTEL CORPORATION
    Inventors: Sanjeev N. Trika, Benjamin W. Boyer, Ravi L. Sahita, Xiaoning Li, Faraz A. Siddiqi
  • Publication number: 20160283160
    Abstract: Provided are a method, system, and computer readable storage medium for managing access to a storage device. A logical-to-physical mapping indicates for each logical address a physical address in the storage device having current data for the logical address and version information indicating whether there is a prior version of data for the logical address. In response to the logical-to-physical mapping indicating that there is no prior version of the data for a target logical address of a write, including information on the target physical address and the physical address indicated in the logical-to-physical mapping in checkpoint information. The version information for the target logical address is updated to indicate that there is a prior version of data. Data for the write is written to a target physical address. The logical-to-physical mapping for the target logical address is updated to indicate the target physical address.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Inventors: Sanjeev N. TRIKA, Benjamin W. BOYER, Ravi L. SAHITA, Xiaoning LI, Faraz A. SIDDIQI