Abstract: A manufacturable GaAs VFET process includes providing a doped GaAs substrate with a lightly doped first epitaxial layer thereon and a heavily doped second epitaxial layer positioned on the first epitaxial layer. A temperature tolerant conductive layer is positioned on the second epitaxial layer and patterned to define a plurality of elongated, spaced apart source areas. Using the patterned conductive layer, a plurality of gate trenches are etched into the first epitaxial layer adjacent the source areas. The bottoms of the gate trenches are implanted and activated to form gate areas. A gate contact is deposited in communication with the implanted gate areas, a source contact is deposited in communication with the patterned conductive layer overlying the source areas, and a drain contact is deposited on the rear surface of the substrate.

Abstract: A vertical cavity surface emitting laser with polarization control includes a first stack of distributed Bragg reflectors positioned on a substrate with an active region including a first cladding region and a second cladding region positioned on opposite sides of an active area overlying the first stack of distributed Bragg reflectors A second stack of distributed Bragg reflectors is positioned on the active region. The second stack has an ion implantation region formed to control and define a lasing threshold of the laser.

Abstract: A method of biasing a semiconductor laser to a threshold level including the step of providing a semiconductor laser, monitoring spontaneous emissions of the semiconductor laser, identifying a point at which the spontaneous emissions clamp, and employing feedback to maintain a threshold level, driven by the identification of the point at which the spontaneous emissions clamp.

Abstract: A method of fabricating an LED array including epitaxially and sequentially growing a conductive layer on a substrate, a first carrier confinement layer, an active layer, a second carrier confinement layer and a conductive cap. Selectively etching the cap to provide exposed surface areas defining row and column areas with a matrix of diodes positioned in rows and columns therebetween. Implanting a first impurity in the row areas to form vertical conductors extending through the second confinement, active and first confinement layers to provide surface contacts to each diode. Implanting a second impurity in the row and column areas through the second confinement and active layers to form an isolating resistive volume around each diode. Implanting a third impurity in the row areas through the second confinement, active, and first confinement layers and into the substrate to form an isolating resistive volume between each row of diodes.

Abstract: A multiwavelength LED device including a first LED constructed to emit light of a first wavelength and a second LED constructed to emit light of a second wavelength, different than the first wavelength. The first and second LEDs are stacked vertically on a substrate and positioned to both emit light in the same direction. One of the LEDs is transparent to light emitted by the other of the LEDs so that light from both LEDs is emitted through a single aperture and can be mixed in intensity to produce a variety of wavelengths. The LEDs are individually addressable.

Abstract: A high density LED array with semiconductor interconnects includes a plurality of layers of material stacked on a substrate including a conductive layer, a first carrier confinement layer, an active layer, and a second carrier confinement layer. The layers are separated into isolated LEDs in a matrix of rows and columns with the conductive layer connecting a first electrode of each LED in a column to a first electrode of each other LED in the column. Row conductors connect a second electrode of each LED in a row to a second electrode of each other LED in the row and column conductors are connected to the conductive layer of each column.

Abstract: A method of fabricating an LED array including epitaxially and sequentially growing a conductive layer on a substrate, a first carrier confinement layer, an active layer, a second carrier confinement layer and a conductive cap. Selectively etching the cap to provide exposed surface areas defining row and column areas with a matrix of diodes positioned in rows and columns therebetween. Implanting a first impurity in the row areas to form vertical conductors extending through the second confinement, active and first confinement layers to provide surface contacts to each diode. Implanting a second impurity in the row and column areas through the second confinement and active layers to form an isolating resistive volume around each diode. Implanting a third impurity in the row areas through the second confinement, active, and first confinement layers and into the substrate to form an isolating resistive volume between each row of diodes.

Abstract: A high density LED array with semiconductor interconnects includes a plurality of layers of material stacked on a substrate including a conductive layer, a first carrier confinement layer, an active layer, and a second carrier confinement layer. The layers are separated into isolated LEDs in a matrix of rows and columns with the conductive layer connecting a first electrode of each LED in a column to a first electrode of each other LED in the column. Row conductors connect a second electrode of each LED in a row to a second electrode of each other LED in the row and column conductors are connected to the conductive layer of each column.