Patents by Inventor Benjamin Wiley

Benjamin Wiley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240079081
    Abstract: Conventional high performance computer connections are electron-based systems, which require the memory packages to be as close as mechanically possible to the computation engine. Low power and high bandwidth long distance communication, e.g. photonic or electronic, links can drastically change the architecture of high-performance computers by eliminating the bottlenecks in communication.
    Type: Application
    Filed: September 29, 2023
    Publication date: March 7, 2024
    Inventors: David Cureton BAKER, Ari NOVACK, Donovan POPPS, Benjamin Wiley MELTON, Bryan COPE, Mark BAUR, Anahita SHAYESTEH
  • Publication number: 20240078175
    Abstract: Conventional high performance computer connections are electron-based systems, which require the memory packages to be as close as mechanically possible to the computation engine. Low power and high bandwidth communication, e.g. photonic, links can drastically change the architecture of high-performance computers by eliminating the bottlenecks in communication. A computer system comprises: a plurality of memory aggregation devices configured to retrieve data from and store data in a plurality of random access memory modules forming a unified contiguous memory address space disaggregated from a processing unit; a plurality of computational devices configured for simultaneously launching a plurality of data signals including memory read and/or write requests for the data to the plurality of memory aggregation devices; and a plurality of communication links coupling each of the plurality of memory aggregation devices to each of the plurality of computational devices for transferring the data therebetween.
    Type: Application
    Filed: January 13, 2023
    Publication date: March 7, 2024
    Inventors: David Cureton BAKER, Ari NOVACK, Donovan POPPS, Benjamin Wiley MELTON, Bryan COPE, Mark BAUR, Anahita SHAYESTEH
  • Publication number: 20240078016
    Abstract: Conventional high performance computer connections are electron-based systems, which require the memory packages to be as close as mechanically possible to the computation engine. Low power and high bandwidth communication, e.g. photonic, links can drastically change the architecture of high-performance computers by eliminating the bottlenecks in communication.
    Type: Application
    Filed: December 30, 2022
    Publication date: March 7, 2024
    Inventors: David Cureton BAKER, Ari NOVACK, Donovan POPPS, Benjamin Wiley MELTON, Bryan COPE, Mark BAUR, Anahita SHAYESTEH
  • Publication number: 20210369915
    Abstract: Artificial cartilage materials for repair and replacement of cartilage (e.g., load-bearing, articular cartilage). The artificial cartilage materials described herein include triple-network hydrogels including a cross-linked fiber network (e.g., a bacterial cellulose nanofiber network) and a double-network hydrogel (e.g., a double-network hydrogel including polfacrylamide-methyl propyl sulfonic acid). The artificial cartilage may be coated onto or formed into an implant (e.g., plug). The artificial cartilage may include a surface macroporosity, e.g., 0.1-300 micrometers diameter. Also described herein are methods of forming and methods of using the triple-network hydrogel artificial cartilage materials.
    Type: Application
    Filed: November 7, 2018
    Publication date: December 2, 2021
    Inventors: Benjamin Wiley, Feichen Yang, Kenneth Gall, Jonathan Riboh
  • Publication number: 20210339316
    Abstract: Methods for producing silver nanostructures with improved dimensional control, yield, purity, monodispersed, and scale of synthesis.
    Type: Application
    Filed: March 17, 2021
    Publication date: November 4, 2021
    Applicant: University of Washington
    Inventors: Younan Xia, Sang-Hyuk Im, Yugang Sun, Yun Tack Lee, Benjamin Wiley
  • Patent number: 10981231
    Abstract: Methods for producing silver nanostructures with improved dimensional control, yield, purity, monodispersity, and scale of synthesis.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: April 20, 2021
    Assignee: University of Washington
    Inventors: Younan Xia, Sang-Hyuk Im, Yugang Sun, Yun Tack Lee, Benjamin Wiley
  • Publication number: 20190305322
    Abstract: A three-dimensional (3D) porous nanowire electrode can include a plurality of nanowires arranged in a 3D mesh configuration within a defined area. The diameter of each nanowire is within a range of 10 nm-1000 nm. The nanowires are sintered to each other at points of contact in the 3D mesh configuration. The 3D porous electrodes can be used in a variety of electrochemical reactor systems, such as reduction-oxidation batteries, water treatment systems, and electrochemical organic synthesis systems.
    Type: Application
    Filed: April 2, 2019
    Publication date: October 3, 2019
    Inventors: Benjamin WILEY, Myung Jun KIM
  • Patent number: 10354773
    Abstract: Noble metal-coated nanostructures and related methods are disclosed. According to an aspect, a nanostructure may include a structure comprising a base metal. As an example, the structure may be a nanowire. In a more specific example, the structure may be a copper nanowire or a nanowire made of a base metal such as nickel, tin, indium, zinc, the like, or combinations thereof. The base metal structure may be coated with a noble metal that conformally covers the base metal structure. Example noble metals include, but are not limited to, ruthenium, rhodium, palladium, silver, iridium, platinum, and gold. The coating may be made of one or more of the noble metals along with other materials.
    Type: Grant
    Filed: April 9, 2017
    Date of Patent: July 16, 2019
    Assignee: Duke University
    Inventor: Benjamin Wiley
  • Publication number: 20190077072
    Abstract: Three-dimensional (3D) printing and injection molding conductive filaments and methods of producing and using the same are disclosed. According to an aspect, a conductive filament for 3D printing includes a material comprising polymer. The conductive filament also includes anisotropic conductive particles dispersed within the material.
    Type: Application
    Filed: September 10, 2018
    Publication date: March 14, 2019
    Inventors: Benjamin Wiley, Shengrong Ye
  • Publication number: 20180311741
    Abstract: Methods for producing silver nanostructures with improved dimensional control, yield, purity, monodispersity, and scale of synthesis.
    Type: Application
    Filed: July 10, 2018
    Publication date: November 1, 2018
    Applicant: University of Washington
    Inventors: Younan Xia, Sang-Hyuk Im, Yugang Sun, Yun Tack Lee, Benjamin Wiley
  • Publication number: 20170294248
    Abstract: Noble metal-coated nanostructures and related methods are disclosed. According to an aspect, a nanostructure may include a structure comprising a base metal. As an example, the structure may be a nanowire. In a more specific example, the structure may be a copper nanowire or a nanowire made of a base metal such as nickel, tin, indium, zinc, the like, or combinations thereof. The base metal structure may be coated with a noble metal that conformally covers the base metal structure. Example noble metals include, but are not limited to, ruthenium, rhodium, palladium, silver, iridium, platinum, and gold. The coating may be made of one or more of the noble metals along with other materials.
    Type: Application
    Filed: April 9, 2017
    Publication date: October 12, 2017
    Inventor: Benjamin Wiley
  • Patent number: 9692419
    Abstract: Compact logic evaluation gates are built using null convention logic (NCL) circuits. The inputs to a null convention circuit include a NCL true input and a NCL complement input. The NCL circuit includes a gate coupled to the pair of inputs, where the gate comprises a plurality of transistors. The transistors allow for logical signal capture, provide a pair of cross-coupled inverters for data storage, and include a first and second pull-down device. The first pull-down device causes a first side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL true input, and the second pull-down device causes a second side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL complement input.
    Type: Grant
    Filed: November 14, 2015
    Date of Patent: June 27, 2017
    Assignee: Wave Computing, Inc.
    Inventors: Benjamin Wiley Melton, Stephen Curtis Johnson
  • Publication number: 20160271701
    Abstract: Methods for producing silver nanostructures with improved dimensional control, yield, purity, monodispersity, and scale of synthesis.
    Type: Application
    Filed: June 2, 2016
    Publication date: September 22, 2016
    Applicant: University of Washington
    Inventors: Younan Xia, Sang-Hyuk Im, Yugang Sun, Yun Tack Lee, Benjamin Wiley
  • Patent number: 9388480
    Abstract: Methods for producing silver nanostructures with improved dimensional control, yield, purity, monodispersity, and scale of synthesis.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: July 12, 2016
    Assignee: University of Washington
    Inventors: Younan Xia, Sang-Hyuk Im, Yugang Sun, Yun Tack Lee, Benjamin Wiley
  • Publication number: 20160142057
    Abstract: Compact logic evaluation gates are built using null convention logic (NCL) circuits. The inputs to a null convention circuit include a NCL true input and a NCL complement input. The NCL circuit includes a gate coupled to the pair of inputs, where the gate comprises a plurality of transistors. The transistors allow for logical signal capture, provide a pair of cross-coupled inverters for data storage, and include a first and second pull-down device. The first pull-down device causes a first side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL true input, and the second pull-down device causes a second side of the pair of cross-coupled inverters to go to a “0” state when a “1” is applied to the NCL complement input.
    Type: Application
    Filed: November 14, 2015
    Publication date: May 19, 2016
    Inventors: Benjamin Wiley Melton, Stephen Curtis Johnson
  • Publication number: 20150336174
    Abstract: Methods for producing silver nanostructures with improved dimensional control, yield, purity, monodispersity, and scale of synthesis.
    Type: Application
    Filed: June 30, 2015
    Publication date: November 26, 2015
    Applicant: University of Washington
    Inventors: Younan Xia, Sang-Hyuk Im, Yugang Sun, Yun Tack Lee, Benjamin Wiley
  • Patent number: 9109270
    Abstract: Methods for producing silver nanostructures with improved dimensional control, yield, purity, monodispersity, and scale of synthesis.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: August 18, 2015
    Assignee: University of Washington
    Inventors: Younan Xia, Sang-Hyuk Im, Yugang Sun, Yun Tack Lee, Benjamin Wiley
  • Patent number: 8921118
    Abstract: Paper-based microfluidic systems and methods of making the same are described.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: December 30, 2014
    Assignee: President and Fellows of Harvard College
    Inventors: Adam C. Siegel, Scott T. Phillips, Michael D. Dickey, Dorota Rozkiewicz, Benjamin Wiley, George M. Whitesides, Andres W. Martinez
  • Publication number: 20140342177
    Abstract: A method of synthesis to produce a conductive film including cupronickel nanowires. Cupronickel nanowires can be synthesized from solution, homogeneously dispersed and printed to make conductive films (preferably <1,000 ?/sq) that preferably transmit greater than 60% of visible light.
    Type: Application
    Filed: December 6, 2012
    Publication date: November 20, 2014
    Applicant: DUKE UNIVERSITY
    Inventor: Benjamin Wiley
  • Patent number: 8628729
    Abstract: Three-dimensional microfluidic devices including by a plurality of patterned porous, hydrophilic layers and a fluid-impermeable layer disposed between every two adjacent patterned porous, hydrophilic layers are described. Each patterned porous, hydrophilic layer has a fluid-impermeable barrier which substantially permeates the thickness of the porous, hydrophilic layer and defines boundaries of one or more hydrophilic regions within the patterned porous, hydrophilic layer. The fluid-impermeable layer has openings which are aligned with at least part of the hydrophilic region within at least one adjacent patterned porous, hydrophilic layer. Microfluidic assay device, microfluidic mixer, microfluidic flow control device are also described.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: January 14, 2014
    Assignee: President and Fellows of Harvard College
    Inventors: Emanuel Carrilho, Andres W. Martinez, Katherine A. Mirica, Scott T. Phillips, Adam C. Siegel, Benjamin Wiley, George M. Whitesides