Abstract: A low profile semiconductor device (24) is manufactured by mounting a semiconductor die (26) onto a substrate (28) using an interposer (30). The interposer couples an active surface (32) of the die (26) to conductive traces (33) on the top surface of the substrate. The interposer is directionally conductive so that electrical conductivity is limited to the z-direction through thickness of the interposer. The interposer both affixes the die to the substrate and provides the first level of interconnects for the device. The inactive surface (36) of the die can be exposed for efficient thermal dissipation. An optional heat spreader (50) may be added for increased thermal management. The device may be overmolded, glob-topped, capped, or unencapsulated. Separate die-attach and wire bonding processes are eliminated. A second level of interconnects are provided by either solder balls (38), solder columns (44), or pins (64).

Abstract: A molded semiconductor device (24) having greater resistance to package cracking during board mounting in addition to increased thermal performance is provided wherein the device has a reduced semiconductor die to flag interface and a drop-in heat sink. The semiconductor die (12) is mounted on a leadframe (16) having a flag (15) with an opening to expose a substantial portion of the inactive surface (14) of the die (12). Decreasing the interfacial contact area between the die (12) and the flag (15) reduces the risk of package cracking during board mounting by limiting the area where delamination typically occurs. An encapsulant (22) forms a package body which encompasses an opening (23) to expose a substantial portion of the inactive surface (14) of the semiconductor die (12). A heat sink (26) is inserted into the opening (23), directly coupling the heat sink (26) to the die (12), after the semiconductor package is mounted onto a printed circuit board.