Patents by Inventor Benno Krabbenborg

Benno Krabbenborg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10454424
    Abstract: A method and operates for generating a boost control signal for a DC-DC-booster is described. An audio signal may be received comprising a plurality of audio sample values. The audio signal may be delayed for a delay time. A maximum-delayed-value of the audio sample values during the delay time may be determined. The boost control signal may be generated from the maximum of the non-delayed audio signal sample value and the maximum-delayed-value.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: October 22, 2019
    Assignee: NXP B.V.
    Inventors: Maarten van Dommelen, Frédéric Chalet, Benno Krabbenborg
  • Patent number: 10432087
    Abstract: A circuit for a switched-mode-power-supply. The switched-mode-power-supply is configured to: receive a current-control-signal; and provide an output-voltage based on the current-control-signal. The circuit comprises a controller, a current-limiter and a clamp-circuit. The controller is configured to: generate a control-voltage based on the difference between: (i) a sense-voltage, which is representative of the output-voltage of the switched-mode-power-supply; and (ii) a reference-voltage; generate a target-current-control-signal based on the control-voltage, wherein the target-current-control-signal is configured to adjust the current through the switched-mode-power-supply in order to bring the sense-voltage closer to the reference-voltage. The current-limiter is configured to provide the current-control-signal as the target-current-control-signal limited to a max-current-control-value.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: October 1, 2019
    Assignee: NXP B.V.
    Inventor: Benno Krabbenborg
  • Publication number: 20190131931
    Abstract: A method and operates for generating a boost control signal for a DC-DC-booster is described. An audio signal may be received comprising a plurality of audio sample values. The audio signal may be delayed for a delay time. A maximum-delayed-value of the audio sample values during the delay time may be determined. The boost control signal may be generated from the maximum of the non-delayed audio signal sample value and the maximum-delayed-value.
    Type: Application
    Filed: August 31, 2018
    Publication date: May 2, 2019
    Inventors: Maarten van Dommelen, Frédéric Chalet, Benno Krabbenborg
  • Publication number: 20190131871
    Abstract: A circuit for a switched-mode-power-supply. The switched-mode-power-supply is configured to: receive a current-control-signal; and provide an output-voltage based on the current-control-signal. The circuit comprises a controller, a current-limiter and a clamp-circuit. The controller is configured to: generate a control-voltage based on the difference between: (i) a sense-voltage, which is representative of the output-voltage of the switched-mode-power-supply; and (ii) a reference-voltage; generate a target-current-control-signal based on the control-voltage, wherein the target-current-control-signal is configured to adjust the current through the switched-mode-power-supply in order to bring the sense-voltage closer to the reference-voltage. The current-limiter is configured to provide the current-control-signal as the target-current-control-signal limited to a max-current-control-value.
    Type: Application
    Filed: September 27, 2018
    Publication date: May 2, 2019
    Inventor: Benno Krabbenborg
  • Patent number: 9641081
    Abstract: A boost converter for converting between an input voltage and an output voltage is disclosed. The boost converter includes an inductor connected to the input voltage a switching arrangement for controlling the switching of the inductor current to an output load at the output voltage and a controller for controlling the switching arrangement to provide duty cycle control. The duty cycle control switching takes place when the inductor current reaches a peak current level which varies over time with a peak current level function. The peak current level function includes the combination of a target peak value derived from a target average inductor current and a slope compensation function which periodically varies with a period corresponding to the converter switching period.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: May 2, 2017
    Assignee: NXP B.V.
    Inventor: Benno Krabbenborg
  • Patent number: 9160290
    Abstract: A Class D power amplifier is for driving a load between first and second output nodes defined between two bridges. A controller is adapted to derive an amplifier hold signal when an overcurrent state is detected in an output bridge, and to prevent switching of the other output bridge between the two main output states.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: October 13, 2015
    Assignee: NXP B.V.
    Inventors: Marco Berkhout, Benno Krabbenborg
  • Patent number: 9041468
    Abstract: A method of operating a switched-mode power supply (SMPS) for supplying power to a load circuit, which draws a supply current that varies with an input signal to the load circuit is disclosed. The method comprises monitoring the input signal and controlling the amount of accumulated energy transferred for consumption by the load circuit, in use, in accordance with the input signal.
    Type: Grant
    Filed: March 20, 2013
    Date of Patent: May 26, 2015
    Assignee: NXP B.V.
    Inventors: Benno Krabbenborg, Marco Berkhout, Johan Somberg, Peter Van De Haar
  • Publication number: 20140247029
    Abstract: A boost converter for converting between an input voltage and an output voltage is disclosed. The boost converter includes an inductor connected to the input voltage a switching arrangement for controlling the switching of the inductor current to an output load at the output voltage and a controller for controlling the switching arrangement to provide duty cycle control. The duty cycle control switching takes place when the inductor current reaches a peak current level which varies over time with a peak current level function. The peak current level function includes the combination of a target peak value derived from a target average inductor current and a slope compensation function which periodically varies with a period corresponding to the converter switching period.
    Type: Application
    Filed: February 26, 2014
    Publication date: September 4, 2014
    Applicant: NXP B.V.
    Inventor: Benno Krabbenborg
  • Publication number: 20130257533
    Abstract: A method of operating a switched-mode power supply (SMPS) for supplying power to a load circuit, which draws a supply current that varies with an input signal to the load circuit is disclosed. The method comprises monitoring the input signal and controlling the amount of accumulated energy transferred for consumption by the load circuit, in use, in accordance with the input signal.
    Type: Application
    Filed: March 20, 2013
    Publication date: October 3, 2013
    Applicant: NXP B.V.
    Inventors: Benno KRABBENBORG, Marco BERKHOUT, Johan SOMBERG, Peter VAN DE HAAR
  • Publication number: 20130049718
    Abstract: A Class D power amplifier is for driving a load between first and second output nodes defined between two bridges. A controller is adapted to derive an amplifier hold signal when an overcurrent state is detected in an output bridge, and to prevent switching of the other output bridge between the two main output states.
    Type: Application
    Filed: August 23, 2012
    Publication date: February 28, 2013
    Applicant: NXP B.V.
    Inventors: Marco BERKHOUT, Benno KRABBENBORG
  • Patent number: 8081022
    Abstract: A device (100) for processing data, the device (100) comprising an integrator unit (103, 104) adapted for integrating an input signal (V1) and a correction unit (101, 102) adapted for correcting a clipping integrator unit (103, 104) by forcing a zero-crossing of an output signal (V1, V2) of the integrator unit (103, 104).
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: December 20, 2011
    Assignee: NXP B.V.
    Inventors: Marco Berkhout, Benno Krabbenborg
  • Patent number: 8067980
    Abstract: A pulse width modulation (PWM) circuit comprises a first integrator (g m1) with a first feedback capacitor (C1), a second integrator (gm1) with a second feedback capacitor (C2) and a comparator (A0) having a first input (V1) connected to the output of the first integrator (gm1) and a second input (V2) connected to the output of the second integrator (gm2). A connection path comprising a resistor (R2) is established from the output of the first integrator (gm1) to an input of the second integrator (gm2). The first and second feedback capacitors (C1, C2) have capacities with a non-linear factor X(V) and a circuit with an inversely non-linear factor X?1(V) is arranged in the connection path between the output of the first integrator (gm1) and said input of the second integrator (gm2). The PWM circuit may form path of a Class-D amplifier.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: November 29, 2011
    Assignee: NXP B.V.
    Inventors: Marco Berkhout, Benno Krabbenborg
  • Publication number: 20100176881
    Abstract: A pulse width modulation (PWM) circuit comprises a first integrator (g m1) with a first feedback capacitor (C1), a second integrator (gml) with a second feedback capacitor (C2) and a comparator (A0) having a first input (V1) connected to the output of the first integrator (gm1) and a second input (V2) connected to the output of the second integrator (gm2). A connection path comprising a resistor (R2) is established from the output of the first integrator (gm1) to an input of the second integrator (gm2). The first and second feedback capacitors (C1, C2) have capacities with a non-linear factor X(V) and a circuit with an inversely non-linear factor X?1(V) is arranged in the connection path between the output of the first integrator (gm1) and said input of the second integrator (gm2). The PWM circuit may form path of a Class-D amplifier.
    Type: Application
    Filed: June 19, 2008
    Publication date: July 15, 2010
    Applicant: NXP B.V.
    Inventors: Marco Berkhout, Benno Krabbenborg
  • Publication number: 20100045356
    Abstract: A device (100) for processing data, the device (100) comprising an integrator unit (103, 104) adapted for integrating an input signal (V1) and a correction unit (101, 102) adapted for correcting a clipping integrator unit (103, 104) by forcing a zero-crossing of an output signal (V1, V2) of the integrator unit (103, 104).
    Type: Application
    Filed: March 11, 2008
    Publication date: February 25, 2010
    Applicant: NXP, B.V.
    Inventors: Marco Berkhout, Benno Krabbenborg