Patents by Inventor Benny Koren

Benny Koren has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11182365
    Abstract: Systems and methods are described that provide for distributively storing and accessing data across multiple hash tables, such that utilization of the hash tables is optimized. In particular, a key associated with a value is split into two or more sub-keys and the sub-keys are inserted into respective hash tables with associated values. For each sub-key except the final sub-key derived from a particular key, the value paired with the sub-key is an identifier that points to the location of the next sub-key and its associated value, which may be stored in the other hash tables. The final sub-key derived from the original key is paired with the value associated with the key, such as an action to be performed. Thus, rather than using a single key (which may be very large) to access or store a particular value, multiple (smaller) sub-keys are used to ultimately access the same value via multiple, smaller hash tables.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: November 23, 2021
    Assignee: Mellanox Technologies TLV Ltd.
    Inventors: Aviv Kfir, Benny Koren, Gil Levy, Barak Gafni
  • Patent number: 10999221
    Abstract: One embodiment includes a communication apparatus, including multiple interfaces including at least one egress interface to transmit packets belonging to multiple flows to a network, and control circuitry to queue packets belonging to the flows in respective flow-specific queues for transmission via a given egress interface, and to arbitrate among the flow-specific queues so as to select packets for transmission responsively to dynamically changing priorities that are assigned such that all packets in a first flow-specific queue, which is assigned a highest priority among the queues, are transmitted through the given egress interface until the first flow-specific queue is empty, after which the control circuitry assigns the highest priority to a second flow-specific queue, such that all packets in the second flow-specific queue are transmitted through the given egress interface until the second flow-specific queue is empty, after which the control circuitry assigns the highest priority to another flow-specifi
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: May 4, 2021
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Barak Gafni, Aviv Kfir, Benny Koren
  • Patent number: 10951549
    Abstract: An Integrated Circuit (IC) includes multiple ports and packet processing circuitry. The ports are configured to serve as ingress ports and egress ports for receiving and transmitting packets from and to a communication network. The packet processing circuitry is configured to forward the packets between the ingress ports and the egress ports, to read an indication that specifies whether the IC is to operate in an internal buffer configuration or in an off-chip buffer configuration, when the indication specifies the internal buffer configuration, to buffer the packets internally to the IC, and, when the indication specifies the off-chip buffer configuration, to configure one or more of the ports for connecting to a memory system external to the IC, and for buffering at least some of the packets in the memory system, externally to the IC.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: March 16, 2021
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: George Elias, Gil Levy, Liron Mula, Aviv Kfir, Benny Koren, Sagi Kuks
  • Publication number: 20210006513
    Abstract: One embodiment includes a communication apparatus, including multiple interfaces including at least one egress interface to transmit packets belonging to multiple flows to a network, and control circuitry to queue packets belonging to the flows in respective flow-specific queues for transmission via a given egress interface, and to arbitrate among the flow-specific queues so as to select packets for transmission responsively to dynamically changing priorities that are assigned such that all packets in a first flow-specific queue, which is assigned a highest priority among the queues, are transmitted through the given egress interface until the first flow-specific queue is empty, after which the control circuitry assigns the highest priority to a second flow-specific queue, such that all packets in the second flow-specific queue are transmitted through the given egress interface until the second flow-specific queue is empty, after which the control circuitry assigns the highest priority to another flow-specifi
    Type: Application
    Filed: July 2, 2019
    Publication date: January 7, 2021
    Inventors: Barak Gafni, Aviv Kfir, Benny Koren
  • Patent number: 10826822
    Abstract: A method for communication includes configuring a router to forward data packets in a network in accordance with MPLS labels appended to the packets. A group of two or more of the interfaces is defined as a multi-path routing group in a forwarding table within the router. A plurality of records are stored in an ILM in the router, corresponding to different, respective label IDs, all pointing to the set of the entries in the forwarding table that belong to the multi-path routing group. Upon receiving in the router an incoming data packet having a label ID corresponding to any given record in the plurality, one of the interfaces in the group is selected, responsively to the given record and to the set of the entries in the forwarding table to which the given record points, for forwarding the incoming data packet without changing the label ID.
    Type: Grant
    Filed: March 1, 2015
    Date of Patent: November 3, 2020
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Barak Gafni, Benny Koren, David Mozes, Linor Nehab
  • Patent number: 10819621
    Abstract: A method for communication includes, in a first network switch that is part of a communication network having a topology, detecting a compromised ability to forward a flow of packets originating from a source endpoint to a destination endpoint. In response to detecting the compromised ability, the first network switch identifies, based on the topology, a second network switch that lies on a current route of the flow, and also lies on one or more alternative routes from the source endpoint to the destination endpoint that do not traverse the first network switch. A notification, which is addressed individually to the second network switch and requests the second network switch to reroute the flow, is sent from the first network switch.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: October 27, 2020
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Gil Levy, Alex Shpiner, Benny Koren
  • Patent number: 10778568
    Abstract: A network element includes multiple ports and packet processing circuitry. The ports are configured for exchanging packets with a communication network. The packet processing circuitry is configured to forward first packets over a forward path from a source node to a destination node, to forward second packets over a reverse path, which is opposite in direction to the forward path, from the destination node to the source node, and to mark one or more of the second packets that are forwarded over the reverse path, with an indication that notifies the source node that congestion is present on the forward path.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: September 15, 2020
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Gil Levy, Alex Shpiner, Benny Koren
  • Publication number: 20200287846
    Abstract: An Integrated Circuit (IC) includes multiple ports and packet processing circuitry. The ports are configured to serve as ingress ports and egress ports for receiving and transmitting packets from and to a communication network. The packet processing circuitry is configured to forward the packets between the ingress ports and the egress ports, to read an indication that specifies whether the IC is to operate in an internal buffer configuration or in an off-chip buffer configuration, when the indication specifies the internal buffer configuration, to buffer the packets internally to the IC, and, when the indication specifies the off-chip buffer configuration, to configure one or more of the ports for connecting to a memory system external to the IC, and for buffering at least some of the packets in the memory system, externally to the IC.
    Type: Application
    Filed: March 7, 2019
    Publication date: September 10, 2020
    Inventors: George Elias, Gil Levy, Liron Mula, Aviv Kfir, Benny Koren, Sagi Kuks
  • Patent number: 10764177
    Abstract: In one embodiment, a network device includes an interface to receive packets from sources in a network for forwarding to destinations in the network, the sources and destinations being assigned to groups, each packet including a source and destination identifier, a memory configured to store a source-group mapping table that maps source identifiers to source-groups, a destination-group mapping table that maps destination identifiers to destination-groups, and an intergroup access-control list that maps source-destination-group pairs to forwarding rules, and a single IC chip configured, for each packet, to find a source-group for the source identifier in the source-group mapping table, find a destination-group for the destination identifier in the destination-group mapping table, find a forwarding rule for a source-destination pair including the found source and destination-group in the intergroup access-control list, and forward or drop the packet according to the found forwarding rule.
    Type: Grant
    Filed: January 21, 2019
    Date of Patent: September 1, 2020
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Barak Gafni, Aviv Kfir, Benny Koren
  • Publication number: 20200236042
    Abstract: In one embodiment, a network device includes an interface to receive packets from sources in a network for forwarding to destinations in the network, the sources and destinations being assigned to groups, each packet including a source and destination identifier, a memory configured to store a source-group mapping table that maps source identifiers to source-groups, a destination-group mapping table that maps destination identifiers to destination-groups, and an intergroup access-control list that maps source-destination-group pairs to forwarding rules, and a single IC chip configured, for each packet, to find a source-group for the source identifier in the source-group mapping table, find a destination-group for the destination identifier in the destination-group mapping table, find a forwarding rule for a source-destination pair including the found source and destination-group in the intergroup access-control list, and forward or drop the packet according to the found forwarding rule.
    Type: Application
    Filed: January 21, 2019
    Publication date: July 23, 2020
    Inventors: Barak Gafni, Aviv Kfir, Benny Koren
  • Patent number: 10708219
    Abstract: A method for communication, includes routing unicast data packets among nodes in a network using respective Layer-3 addresses that are uniquely assigned to each of the nodes. Respective Layer-2 unicast addresses are assigned to the nodes in accordance with an algorithmic mapping of the respective Layer-3 addresses. The unicast data packets are forwarded within subnets of the network using the assigned Layer-2 addresses.
    Type: Grant
    Filed: November 20, 2016
    Date of Patent: July 7, 2020
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Zachy Haramaty, Diego Crupnicoff, Freddy Gabbay, Benny Koren, Amiad Marelli, Itamar Rabenstein, Ido Bukspan, Oded Zemer
  • Patent number: 10658739
    Abstract: An printed circuit board (PCB) assembly and method of assembling the same for a high-speed, short-reach communication link are described that provide a mechanism for transmitting radio frequency (RF) waves from one digital electronic component of the PCB assembly to another, where the second digital electronic component is located either on the same PCB assembly or on a second PCB assembly. The assembly includes a PCB having multiple layers and a digital electronic component supported by the PCB. At least one of the layers defines a channel that confines RF waves therein. An RF antenna in communication with the digital electronic component extends into the channel, and the RF antenna transmits RF signals generated by the digital electronic component into the channel as RF waves or receives RF waves via the channel and conveys corresponding RF signals to the digital electronic component.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: May 19, 2020
    Assignee: Mellanox Technologies, ltd.
    Inventors: Elad Mentovich, Yaakov Gridish, Oded Wertheim, Sylvie Rockman, Benny Koren
  • Patent number: 10623296
    Abstract: A method for packet generation includes designating a group of one or more ports, from among multiple ports of one or more network elements, to perform the packet generation. A circular packet path, which traverses one or more buffers of the ports in the group, is configured. A burst of one or more packets is provided to the group, so as to cause the burst of packets to repeatedly traverse the circular packet path. A packet stream, including the repeated burst of packets, is transmitted from one of the ports.
    Type: Grant
    Filed: July 4, 2017
    Date of Patent: April 14, 2020
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Zachy Haramaty, Liron Mula, George Elias, Aviv Kfir, Barak Gafni, Gil Levy, Benny Koren, Itamar Rabenstein, Maty Golovaty
  • Patent number: 10613273
    Abstract: An optical component assembly is provided including a substrate. The assembly includes an optical transmitter configured to transmit an optical signal, an optical receiver configured to receive the optical signal, and an optical waveguide extending between the optical transmitter and the optical receiver. The assembly further includes a frangible region defining a first portion of the substrate and a second portion of the substrate, wherein the frangible region is configured to allow the first portion to be separated from the second portion. The assembly may be configured to be modified from a testing configuration, in which the first portion is integrally connected to the second portion via the frangible region, to an operational configuration, in which the first portion is separated from the second portion such that communication of optical signals between the optical transmitter and the optical receiver is precluded.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: April 7, 2020
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Elad Mentovich, Yaakov Gridish, Oded Wertheim, Sylvie Rockman, Benny Koren
  • Patent number: 10601714
    Abstract: A method for communication includes receiving and forwarding packets in multiple flows to respective egress interfaces of a switching element for transmission to a network. For each of one or more of the egress interfaces, in each of a succession of arbitration cycles, a respective number of the packets in each of the plurality of the flows that are queued for transmission through the egress interface is assessed, and the flows for which the respective number is less than a selected threshold to a first group, while assigning the flows for which the respective number is equal to or greater than the selected threshold are assigned to a second group. The received packets that have been forwarded to the egress interface and belong to the flows in the first group are transmitted with a higher priority than the flows in the second group.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: March 24, 2020
    Assignee: Mellanox Technologies TLV Ltd.
    Inventors: Eyal Srebro, Sagi Kuks, Liron Mula, Barak Gafni, Benny Koren, George Elias, Itamar Rabenstein, Niv Aibester
  • Publication number: 20190173776
    Abstract: A network element includes multiple ports and packet processing circuitry. The ports are configured for exchanging packets with a communication network. The packet processing circuitry is configured to forward first packets over a forward path from a source node to a destination node, to forward second packets over a reverse path, which is opposite in direction to the forward path, from the destination node to the source node, and to mark one or more of the second packets that are forwarded over the reverse path, with an indication that notifies the source node that congestion is present on the forward path.
    Type: Application
    Filed: December 5, 2017
    Publication date: June 6, 2019
    Inventors: Gil Levy, Alex Shpiner, Benny Koren
  • Patent number: 10284383
    Abstract: A switch in a data network is configured to mediate data exchanges among network elements. The apparatus further includes a processor, which organizes the network elements into a hierarchical tree having a root node network element, vertex node network elements, and child node network elements that include leaf node network elements. The leaf node network elements are originate aggregation data and transmit the aggregation data to respective parent vertex node network elements. The vertex node network elements combine the aggregation data from at least a portion of the child node network elements, and transmit the combined aggregation data from the vertex node network elements to parent vertex node network elements. The root node network element is operative for initiating a reduction operation on the aggregation data.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: May 7, 2019
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Gil Bloch, Diego Crupnicoff, Benny Koren, Oded Wertheim, Lion Levi, Richard Graham, Michael Kagan
  • Patent number: 10237204
    Abstract: A method for communication includes providing multiple chassis. Each chassis includes a plurality of slots, which are arranged in at least an outer tier and a middle tier, and which are configured for insertion therein of respective switches. In at least a first chassis among the multiple chassis, first internal interconnects are connected between the slots in the middle tier and the slots in the outer tier, so as to connect each of the slots in the middle tier to multiple slots in the outer tier. In at least a second chassis among the multiple chassis, second internal interconnects are connected directly between the slots in the outer tier. External interconnects are connected between at least some of the slots in the outer tier of the first chassis and at least some of the slots in the outer tier of the second chassis in order to define a network.
    Type: Grant
    Filed: December 20, 2015
    Date of Patent: March 19, 2019
    Assignee: Mellanox Technologies TLV Ltd.
    Inventors: Barak Gafni, Eitan Zahavi, Benny Koren
  • Patent number: 10182017
    Abstract: A network switch includes circuitry, multiple ports and multiple hardware-implemented distinct-flow counters. The multiple ports are configured to receive packets from a communication network. Each of the multiple hardware-implemented distinct-flow counters is configured to receive (i) a respective count definition specifying one or more packet-header fields and (ii) a respective subset of the received packets, and to estimate a respective number of distinct flows that are present in the subset, by evaluating, over the packets in the subset, a number of distinct values in the packet-header fields belonging to the count definition. The circuitry is configured to provide each of the distinct-flow counters with the respective subset of the received packets, including providing a given packet to a plurality of the distinct-flow counters, and to identify an event-of-interest based on numbers of distinct flows estimated by the distinct-flow counters.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: January 15, 2019
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: David Mozes, Liron Mula, Benny Koren
  • Publication number: 20180335567
    Abstract: An optical component assembly is provided including a substrate. The assembly includes an optical transmitter configured to transmit an optical signal, an optical receiver configured to receive the optical signal, and an optical waveguide extending between the optical transmitter and the optical receiver. The assembly further includes a frangible region defining a first portion of the substrate and a second portion of the substrate, wherein the frangible region is configured to allow the first portion to be separated from the second portion. The assembly may be configured to be modified from a testing configuration, in which the first portion is integrally connected to the second portion via the frangible region, to an operational configuration, in which the first portion is separated from the second portion such that communication of optical signals between the optical transmitter and the optical receiver is precluded.
    Type: Application
    Filed: May 9, 2018
    Publication date: November 22, 2018
    Inventors: Elad MENTOVICH, Yaakov GRIDISH, Oded WERTHEIM, Sylvie ROCKMAN, Benny KOREN