Abstract: An improved circuit configuration is disclosed for calibrating and/or verifying the operation of phase shifters in a phased array radar system. In one illustrative embodiment, a method includes: (i) programming a set of phase shifters to convert a radio frequency signal into a set of channel signals; (ii) splitting off a monitor signal from each channel signal while coupling the set of channel signals to a set of antenna feeds; and (iii) while taking the monitor signals in pairs associated with adjacent channels, measuring a relative phase between each pair of monitor signals.

Abstract: Automotive radar systems may employ a reconfigurable connection of antennas to radar transmitters and/or receivers. An illustrative embodiment of an automotive radar system includes: a radar transmitter; a radar receiver; and a digital signal processor coupled to the radar receiver to detect reflections of a signal transmitted by the radar transmitter and to derive signal measurements therefrom. At least one of the radar transmitter and the radar receiver are switchable to provide the digital signal processor with signals from each of multiple combinations of transmit antenna and receive antenna.

Abstract: Multi-input downconversion mixers, systems, and methods are provided with input switching in the intermediate frequency or baseband domain. One illustrative mixer embodiment includes: multiple differential pairs of transistors and multiple pairs of switches. Each differential transistor pair has their bases or gates driven by a differential reference signal, their emitters or sources connected to a common node having a current or voltage driven based on a respective one of multiple receive signals, and their collectors or drains providing a product of the differential reference signal with the respective one of the multiple receive signals. Each of the switch pairs selectively couples differential output nodes to the collectors or drains of a respective one of the multiple differential pairs, enabling the differential output nodes to convey an output signal that is a sum of products from selected ones of the multiple differential pairs.

Abstract: An improved circuit configuration is disclosed for calibrating and/or verifying the operation of phase shifters in a phased array radar system. In one illustrative embodiment, a method includes: (i) programming a set of phase shifters to convert a radio frequency signal into a set of channel signals; (ii) splitting off a monitor signal from each channel signal while coupling the set of channel signals to a set of antenna feeds; and (iii) while taking the monitor signals in pairs associated with adjacent channels, measuring a relative phase between each pair of monitor signals.

Abstract: An improved circuit configuration is disclosed for calibrating and/or verifying the operation of phase shifters in a phased array radar system. In one illustrative embodiment, a method includes: (i) programming a set of phase shifters to convert a radio frequency signal into a set of channel signals; (ii) splitting off a monitor signal from each channel signal while coupling the set of channel signals to a set of antenna feeds; and (iii) while taking the monitor signals in pairs associated with adjacent channels, measuring a relative phase between each pair of monitor signals.

Abstract: Multi-input downconversion mixers, systems, and methods are provided with input switching in the intermediate frequency or baseband domain. One illustrative mixer embodiment includes: multiple differential pairs of transistors and multiple pairs of switches. Each differential transistor pair has their bases or gates driven by a differential reference signal, their emitters or sources connected to a common node having a current or voltage driven based on a respective one of multiple receive signals, and their collectors or drains providing a product of the differential reference signal with the respective one of the multiple receive signals. Each of the switch pairs selectively couples differential output nodes to the collectors or drains of a respective one of the multiple differential pairs, enabling the differential output nodes to convey an output signal that is a sum of products from selected ones of the multiple differential pairs.

Abstract: Automotive radar systems may employ a reconfigurable connection of antennas to radar transmitters and/or receivers. An illustrative embodiment of an automotive radar system includes: a radar transmitter; a radar receiver; and a digital signal processor coupled to the radar receiver to detect reflections of a signal transmitted by the radar transmitter and to derive signal measurements therefrom. At least one of the radar transmitter and the radar receiver are switchable to provide the digital signal processor with signals from each of multiple combinations of transmit antenna and receive antenna.

Abstract: Multi-input downconversion mixers, systems, and methods are provided with input switching in the intermediate frequency or baseband domain. One illustrative mixer embodiment includes: multiple differential pairs of transistors and multiple pairs of switches. Each differential transistor pair has their bases or gates driven by a differential reference signal, their emitters or sources connected to a common node having a current or voltage driven based on a respective one of multiple receive signals, and their collectors or drains providing a product of the differential reference signal with the respective one of the multiple receive signals. Each of the switch pairs selectively couples differential output nodes to the collectors or drains of a respective one of the multiple differential pairs, enabling the differential output nodes to convey an output signal that is a sum of products from selected ones of the multiple differential pairs.

Abstract: Automotive radar systems may employ a reconfigurable connection of antennas to radar transmitters and/or receivers. An illustrative embodiment of an automotive radar system includes: a radar transmitter; a radar receiver; and a digital signal processor coupled to the radar receiver to detect reflections of a signal transmitted by the radar transmitter and to derive signal measurements therefrom. At least one of the radar transmitter and the radar receiver are switchable to provide the digital signal processor with signals from each of multiple combinations of transmit antenna and receive antenna.

Abstract: An improved circuit configuration is disclosed for calibrating and/or verifying the operation of phase shifters in a phased array radar system. In one illustrative embodiment, a method includes: (i) programming a set of phase shifters to convert a radio frequency signal into a set of channel signals; (ii) splitting off a monitor signal from each channel signal while coupling the set of channel signals to a set of antenna feeds; and (iii) while taking the monitor signals in pairs associated with adjacent channels, measuring a relative phase between each pair of monitor signals.

Abstract: An array of one or more integrated circuits includes at least one local input port to receive a chirp signal from a local generator; one or more primary input ports to each receive a respective chirp signal from a remote source; a primary switch arrangement operable to switch between the chirp signals from the at least one local input port and the one or more primary input ports to produce a composite signal having a chirp sequence with at least one chirp that begins during a settling period of a previous chirp; and one or more primary output ports to supply a local oscillator signal to a transmitter and a receiver based on the composite signal. The roles of master circuit and follower circuit can change during operation of the array.

Abstract: Multi-input downconversion mixers, systems, and methods are provided with input switching in the intermediate frequency or baseband domain. One illustrative mixer embodiment includes: multiple differential pairs of transistors and multiple pairs of switches. Each differential transistor pair has their bases or gates driven by a differential reference signal, their emitters or sources connected to a common node having a current or voltage driven based on a respective one of multiple receive signals, and their collectors or drains providing a product of the differential reference signal with the respective one of the multiple receive signals. Each of the switch pairs selectively couples differential output nodes to the collectors or drains of a respective one of the multiple differential pairs, enabling the differential output nodes to convey an output signal that is a sum of products from selected ones of the multiple differential pairs.

Abstract: Automotive radar systems may employ a reconfigurable connection of antennas to radar transmitters and/or receivers. An illustrative embodiment of an automotive radar system includes: a radar transmitter; a radar receiver; and a digital signal processor coupled to the radar receiver to detect reflections of a signal transmitted by the radar transmitter and to derive signal measurements therefrom. At least one of the radar transmitter and the radar receiver are switchable to provide the digital signal processor with signals from each of multiple combinations of transmit antenna and receive antenna.

Abstract: A method includes providing a resonant attenuation circuit comprising a first active shorting device connected to a proximal end of an inductive element and a second active shorting device connected to a distal end of the inductive element. The method also includes providing a first control signal to the first active shorting device that places the first active shorting device in a region of operation where incremental increases or decreases in voltage change a shorting impedance of the second active shorting device. A signal attenuator includes a signal propagation path and a plurality of shorting units sequentially attached to the signal propagation path and a control circuit configured to control a level of attenuation provided by each shorting unit. The control circuit and a corresponding method activates subsequent shorting units only if all previous shorting units are at least partially activated.

Abstract: An attenuation circuit comprises a signal propagation path and a plurality of shorting units (e.g., devices) sequentially attached to the signal propagation path. In some embodiments, each of one or more initial shorting units of the plurality of shorting units have a dominant intermodulation product term for a full amplitude signal that is less than that of each of one or more subsequent shorting units of the plurality of shorting units. In some embodiments, each of one or more initial shorting units are less sensitive to control voltage changes than each of one or more subsequent shorting units. In some embodiments, each of one or more initial shorting units provide higher levels of attenuation than each of one or more subsequent shorting units. A method includes providing the above attenuation circuit and controlling a level of attenuation provided by each shorting unit of the plurality of shorting units.

Abstract: A THz radiation detector comprising a vertical antenna separated from a suspended platform by an isolating thermal air gap for concentrating THz radiation energy into a smaller suspended MEMS platform upon which a thermal sensor element is located. THz photon energy is converted into electrical energy via a thermally isolated air gap between plates of a coupling capacitor that couples energy from the antenna to the thermal sensor. The capacitor plates used for capacitive coupling of the received signal realize an electro-static actuator whereby the application of a DC bias varies the coupling capacitor gap. The DC bias causes the actuator to pull the suspended platform close to the antenna to reduce the capacitive gap, increasing the coupling capacitance, to touch the antenna array thus quickly discharging the heat induced in the sensor platform or to perform advanced readout operations, such as amplitude modulation and correlated double sampling.

Abstract: A frequency quadrupler comprises a balanced topology which increases broadband odd harmonic suppression. The frequency quadrupler is constructed in a cascode configuration which is a two-stage amplifier composed of a transconductance amplifier followed by a current buffer. The cascode is constructed with common emitter (CE) and common base (CB) stages which further improves the multiplier frequency response. The cascode configuration enables a notch filter to be placed between the common emitter and common base stages to reduce 2nd harmonic generation and thereby increase 4th harmonic output power, generation efficiency and conversion gain. To cancel 4th harmonic components at the input that may destructively interfere with the output signal, capacitors are placed at the input of the common emitter stage, which in conjunction with the parasitic base wire inductance, form a notch filter to short the 4th harmonic.

Abstract: A novel and useful method of migrating an analog or mixed signal electronic circuit from a source technology to a target technology. Devices operating in current mode and their respective voltage tuning nodes are first identified in the source technology electronic circuit. Since a device operating in current mode is less sensitive to the voltage applied to its voltage tuning node, the voltage at the voltage tuning node can be changed to achieve better current mode device performance without interfering with the biasing conditions of other devices in the circuit. This enables a circuit designer to fully exploit the two available degrees of freedom (typically width and length) when migrating the electronic device operating in current mode from a source technology to a target technology.

Abstract: A frequency quadrupler comprises a balanced topology which increases broadband odd harmonic suppression. The frequency quadrupler is constructed in a cascode configuration which is a two-stage amplifier composed of a transconductance amplifier followed by a current buffer. The cascode is constructed with common emitter (CE) and common base (CB) stages which further improves the multiplier frequency response. The cascode configuration enables a notch filter to be placed between the common emitter and common base stages to reduce 2nd harmonic generation and thereby increase 4th harmonic output power, generation efficiency and conversion gain. To cancel 4th harmonic components at the input that may destructively interfere with the output signal, capacitors are placed at the input of the common emitter stage, which in conjunction with the parasitic base wire inductance, form a notch filter to short the 4th harmonic.

Abstract: Methods are provided for building integrated circuit transformer devices having compact and optimized architectures for use in MMW (millimeter-wave) applications. The integrated circuit transformer devices have universal and scalable architectures that can be used as templates or building blocks for constructing various types of on-chip devices for millimeter-wave applications.