Abstract: The invention relates to a method of fault management in a network of nodes (2), comprising, for each node considered (2) of all or part of the nodes (2) of the network performing one and the same calculation: firstly, a step of local backup of the state of this node considered (21), at the level of a storage medium (31) for this node considered (21), the link (6) between this storage medium (31) and this node considered (21) being able to be redirected from this storage medium (31) to another node (23), thereafter, a step of relaunching: either of the node considered (21) if the latter is not defective, on the basis of the local backup of the state of this node considered (21), or of an operational node (23) different from the node considered (21), if the node considered (21) is defective, on the basis of the recovery of the local backup of the state of this node considered (21), by redirecting said link (6) between the node considered (21) and its storage medium (31) so as to connect said storage medium (31

Abstract: The invention relates to a method of fault management in a network of nodes (2), comprising, for each node considered (2) of all or part of the nodes (2) of the network performing one and the same calculation: firstly, a step of local backup of the state of this node considered (21), at the level of a storage medium (31) for this node considered (21), the link (6) between this storage medium (31) and this node considered (21) being able to be redirected from this storage medium (31) to another node (23), thereafter, a step of relaunching: either of the node considered (21) if the latter is not defective, on the basis of the local backup of the state of this node considered (21), or of an operational node (23) different from the node considered (21), if the node considered (21) is defective, on the basis of the recovery of the local backup of the state of this node considered (21), by redirecting said link (6) between the node considered (21) and its storage medium (31) so as to connect said storage medium (31

Abstract: The invention relates in particular to optimizing memory access in a microprocessor including several logic cores upon the resumption of executing a main application, and enabling the simultaneous execution of at least two processes in an environment including a hierarchically organized shared memory including a top portion and a bottom portion, a datum being copied from the bottom portion to the top portion for processing by the application. The computer is adapted to interrupt the execution of the main application. Upon an interruption in the execution of said application, a reference to a datum stored in a top portion of the memory is stored, wherein said datum must be used in order to enable the execution of the application. After programming a resumption of the execution of the application and before the resumption thereof, said datum is accessed in a bottom portion of the memory in accordance with the reference to be stored in a top portion of the memory.

Abstract: The invention relates to a process for assignment, by an addressing server for a network, of a network address to a terminal network-element connected to one of the connection ports of one of the interconnection network-elements of said network, comprising: transmission of a network address request by said terminal network-element to said interconnection network-element, the determination by said interconnection network-element of a location of said terminal network-element where said location combines a topological identifier for said interconnection network-element with at least one identifier for said connection port, the transmission by said interconnection network-element to said addressing server of said request with said location, assignment by said addressing server to said terminal network-element of said network address based on said location.

Abstract: The invention relates in particular to optimizing memory access in a microprocessor including several logic cores upon the resumption of executing a main application, and enabling the simultaneous execution of at least two processes in an environment including a hierarchically organized shared memory including a top portion and a bottom portion, a datum being copied from the bottom portion to the top portion for processing by the application. The computer is adapted to interrupt the execution of the main application. Upon an interruption in the execution of said application, a reference to a datum stored in a top portion of the memory is stored, wherein said datum must be used in order to enable the execution of the application. After programming a resumption of the execution of the application and before the resumption thereof, said datum is accessed in a bottom portion of the memory in accordance with the reference to be stored in a top portion of the memory.

Abstract: A method designed to configure an IT system having at least one computing core for executing instruction threads, in which each computing core is capable of executing at least two instruction threads at a time in an interlaced manner, and an operating system, being executed on the IT system, capable of providing instruction threads to each computing core. The method includes a step of configuring the operating system being executed in a mode in which it provides each computing core with a maximum of one instruction thread at a time.

Abstract: The invention relates in particular to optimizing memory access in a microprocessor including several logic cores upon the resumption of executing a main application, and enabling the simultaneous execution of at least two processes in an environment including a hierarchically organized shared memory including a top portion and a bottom portion, a datum being copied from the bottom portion to the top portion for processing by the application. The computer is adapted to interrupt the execution of the main application. Upon an interruption in the execution of said application, a reference to a datum stored in a top portion of the memory is stored, wherein said datum must be used in order to enable the execution of the application. After programming a resumption of the execution of the application and before the resumption thereof, said datum is accessed in a bottom portion of the memory in accordance with the reference to be stored in a top portion of the memory.

Abstract: A method designed to configure an IT system having at least one computing core for executing instruction threads, in which each computing core is capable of executing at least two instruction threads at a time in an interlaced manner, and an operating system, being executed on the IT system, capable of providing instruction threads to each computing core. The method includes a step of configuring the operating system being executed in a mode in which it provides each computing core with a maximum of one instruction thread at a time.

Abstract: The subject of the invention is in particular the optimization of standby management of a part of a microprocessor allowing implementation of at least two logic cores, said at least one microprocessor comprising means for placing at least one resource non common to said at least two logic cores on standby. After having determined (400) a desired standby state for each of said at least two logic cores, said desired standby state of one of said at least two logic cores is compared with the said desired standby state of the other of said at least two logic cores. In response to said comparison, instructions preparing for said placement on standby and/or allowing the restoration of said one of said at least two logic cores are launched (420).

Abstract: A method of operating a computer system in communications, via a communication network, with a server comprising an image of a kernel of a minimal operating system and an image of an associated file system for the computer system includes loading, via the communication network, the kernel image from the server to the computer system in accordance with a network transfer protocol interface, and loading, via the communication network, the file system image from the server to the computer system in accordance with the same network transfer protocol interface used to load the kernel image, wherein the loading of the kernel image from the server to the computer system is launched before the loading of the file system image from the server to the computer system is completed, and wherein the loading of the file system image from the server to the computer system is launched before the loading of the kernel image from the server to the computer system is completed.

Abstract: The invention relates to a process for assignment, by an addressing server for a network, of a network address to a terminal network-element connected to one of the connection ports of one of the interconnection network-elements of said network, comprising: transmission of a network address request by said terminal network-element to said interconnection network-element, the determination by said interconnection network-element of a location of said terminal network-element where said location combines a topological identifier for said interconnection network-element with at least one identifier for said connection port, the transmission by said interconnection network-element to said addressing server of said request with said location, assignment by said addressing server to said terminal network-element of said network address based on said location.

Abstract: The dynamic monitoring of distances, in particular of memory access distances, in a non-uniform memory access (NUMA) type system comprising a plurality of processors, and a local memory being associated with each processor of the plurality of processors is disclosed. In one aspect, after having obtained at least one NUMA distance between at least one first processor of the plurality of processors and a local memory associated with at least one second processor of the plurality of processors, the at least one NUMA distance obtained is stored in place of at least one NUMA distance, previously stored, between the at least one first processor and the local memory associated with the at least one second processor, the at least one NUMA distance stored being usable directly by the operating system of the NUMA type system.

Abstract: The invention relates in particular to the optimization of the execution of a software application in a system having multiprocessor architecture including a plurality of input/output controllers and secondary processing units. After determining (300) the system topology, a call to a function to be executed by a secondary processing unit is intercepted (305). The main processor that generated said call is identified (310). A secondary processing unit is then identified (315) according to the main processor identified and according to the topology of said system. Advantageously, the secondary processing unit thus identified is the secondary processing unit that is the closest to the identified main processor. The call is then modified (320) in order to force the execution of at least one part of the function called in the identified secondary processing unit.

Abstract: The invention relates in particular to optimizing memory access in a microprocessor including several logic cores upon the resumption of executing a main application, and enabling the simultaneous execution of at least two processes in an environment including a hierarchically organized shared memory including a top portion and a bottom portion, a datum being copied from the bottom portion to the top portion for processing by the application. The computer is adapted to interrupt the execution of the main application. Upon an interruption in the execution of said application, a reference to a datum stored in a top portion of the memory is stored, wherein said datum must be used in order to enable the execution of the application. After programming a resumption of the execution of the application and before the resumption thereof, said datum is accessed in a bottom portion of the memory in accordance with the reference to be stored in a top portion of the memory.

Abstract: The subject of the invention is in particular the optimization of standby management of a part of a microprocessor allowing implementation of at least two logic cores, said at least one microprocessor comprising means for placing at least one resource non common to said at least two logic cores on standby. After having determined (400) a desired standby state for each of said at least two logic cores, said desired standby state of one of said at least two logic cores is compared with the said desired standby state of the other of said at least two logic cores. In response to said comparison, instructions preparing for said placement on standby and/or allowing the restoration of said one of said at least two logic cores are launched (420).

Abstract: A method designed to configure an IT system having at least one computing core for executing instruction threads, in which each computing core is capable of executing at least two instruction threads at a time in an interlaced manner, and an operating system, being executed on the IT system, capable of providing instruction threads to each computing core. The method includes a step of configuring the operating system being executed in a mode in which it provides each computing core with a maximum of one instruction thread at a time.

Abstract: The subject of the invention is in particular the optimization of the loading and booting of an operating system of a computer system via a communication network to which at least one server is connected. Said server comprises at least one image of a kernel of a minimal operating system and an image of an associated file system. The method comprises steps of loading said image of said kernel (330) and said image of said file system (325). One of said steps of loading said image of said kernel (330) and of loading said image of said file system (325) is launched before the end of the implementation (335, 340) of the other of said steps of loading said image of said kernel and of loading said image of said file system.

Abstract: The invention relates in particular to the optimisation of the execution of a software application in a system having multiprocessor architecture including a plurality of input/output controllers and secondary processing units. After determining (300) the system topology, a call to a function to be executed by a secondary processing unit is intercepted (305). The main processor that generated said call is identified (310). A secondary processing unit is then identified (315) according to the main processor identified and according to the topology of said system. Advantageously, the secondary processing unit thus identified is the secondary processing unit that is the closest to the identified main processor. The call is then modified (320) in order to force the execution of at least one part of the function called in the identified secondary processing unit.