Abstract: A plurality of design iterations are executed for a flow to design a circuit. The design flow includes a sequence of at least two stages. Each stage produces an output design of the circuit from an input design of the circuit, in accordance with parameters for that stage. The design iterations select parameter values for slices of one or more stages of the design flow. In the design iterations for at least one of the slices, parameter values for a non-final stage of the design flow are selected based on a final quality of result (QoR) of the design flow. The design iterations for this slice are adapted based on final QoRs produced by the design iterations.