Abstract: Determining if a hermetically sealed MEMs device loses hermeticity during operation. In one embodiment, the MEMs device is an accelerometer. A test signal having an associated frequency above an operational frequency range for the accelerometer is provided to the accelerometer at an input during operation of the accelerometer for sensing an acceleration. The output signal of the accelerometer is filtered at least above the operational frequency range of the accelerometer producing a test output signal. The test output signal is then compared to a predetermined threshold to determine if the amplitude of the test output signal differs from the threshold. If the amplitude of the test output signal differs from the predetermined threshold, an error signal is produced indicating that hermeticity of the accelerometer has been lost.

Abstract: A transducer array of micromachined ultrasonic transducer elements is connected to a microbeamformer. Driver circuits of the microbeamformer have a first output coupled to a first electrode of a respective transducer element and a second output coupled to a second electrode of the respective transducer element. The driver circuits apply first and second time varying voltage signals to the electrodes, with one voltage signal being time inverted relative to the other. The peak-to-peak voltage applied to the transducer element is 1.75 to 2.0 times the peak-to-peak voltage of either the first or the second time varying voltage signal.

Abstract: A capacitive ultrasound transducer capable of operation in collapsed mode either with a reduced bias voltage, or with no bias voltage, is provided. The transducer includes a substrate that is contoured so that a middle region of the flexible membrane is collapsed against the substrate in the absence of a bias voltage. A non-collapsible gap may exists between the substrate and peripheral regions of the flexible membrane. The contour of the substrate may be such as to strain the flexible membrane past the point of collapse, or to mechanically interfere with the flexible membrane. The substrate may include a further membrane disposed beneath the flexible membrane, the further membrane being contoured so that the flexible membrane is collapsed against it. The substrate may a support disposed beneath the further membrane to deflect a corresponding portion of the further membrane upward toward the flexible membrane. The support may be a post.

Abstract: A capacitive ultrasound transducer capable of operation in collapsed mode either with a reduced bias voltage, or with no bias voltage, is provided. The transducer includes a substrate that is contoured so that a middle region of the flexible membrane is collapsed against the substrate in the absence of a bias voltage. A non-collapsible gap may exists between the substrate and peripheral regions of the flexible membrane. The contour of the substrate may be such as to strain the flexible membrane past the point of collapse, or to mechanically interfere with the flexible membrane. The substrate may include a further membrane disposed beneath the flexible membrane, the further membrane being contoured so that the flexible membrane is collapsed against it. The substrate may a support disposed beneath the further membrane to deflect a corresponding portion of the further membrane upward toward the flexible membrane. The support may be a post.

Abstract: An ultrasonic transducer (104,313), transducer array (103) and an ultrasonic probe (100) are described.

Abstract: A field effect device includes at least one segmented field plate, each of the at least one segmented field plates having a plurality of segments that each form a plate of a capacitor, wherein the field effect device is connected to an electronic element that dynamically connects selected segments to selectively set a gate-to-drain and a drain-to-source capacitance. An ultrasonic device includes a transducer coupled to a switching device that switches the transducer between a transmit mode and a receive mode switching device, wherein the switching device includes the field effect device.

Abstract: An integrated SOI circuit is provided for implementing high-voltage ultrasound functions of an ultrasound imaging system. The integrated circuit is packaged as an integrated chip. The integrated circuit is composed of silicon-on-insulator (SOI) technology and integrates at least the following high-voltage ultrasound functions: gatedriver, power amplifier, transmit/receive switch. Optionally the integrated chip may contain a low noise amplifier and an analog multiplexer.

Abstract: A field effect device includes at least one segmented field plate, each of the at least one segmented field plates having a plurality of segments that each form a plate of a capacitor, wherein the field effect device is connected to an electronic element that dynamically connects selected segments to selectively set a gate-to-drain and a drain-to-source capacitance. An ultrasonic device includes a transducer coupled to a switching device that switches the transducer between a transmit mode and a receive mode switching device, wherein the switching device includes the field effect device.

Abstract: The present invention provides a semiconductor device of the SOI-LDMOS type in which the field plate is divided into a plurality of electrically isolated sub-field plates. At least two of the divided sub-field plates are connected to external circuits for reading their respective output voltages. By connecting a first external circuit and a second external circuit having specific components, one is configured for determining an instantaneous output voltage and the other is configured for determining a change in output voltage as a function of time. Power is disconnected from the semiconductor device if either the instantaneous voltage or the derivative of voltage over time exceeds an established value.

Abstract: The present invention provides a semiconductor device of the SOI-LDMOS type in which the field plate is divided into a plurality of electrically isolated sub-field plates. At least two of the divided sub-field plates are connected to external circuits for reading their respective output voltages. By connecting a first external circuit and a second external circuit having specific components, one is configured for determining an instantaneous output voltage and the other is configured for determining a change in output voltage as a function of time. Power is disconnected from the semiconductor device if either the instantaneous voltage or the derivative of voltage over time exceeds an established value.

Abstract: The present invention provides a semiconductor device of the SOI-LDMOS type in which the field plate is divided into a plurality of electrically isolated sub-field plates. At least two of the divided sub-field plates are connected to external circuits for reading their respective output voltages. By connecting a first external circuit and a second external circuit having specific components, one is configured for determining an instantaneous output voltage and the other is configured for determining a change in output voltage as a function of time. Power is disconnected from the semiconductor device if either the instantaneous voltage or the derivative of voltage over time exceeds an established value.

Abstract: A lateral insulated gate bipolar PMOS device includes a semiconductor substrate, a buried insulating layer and a lateral PMOS transistor device in an SOI layer on the buried insulating layer having a source region of p-type conductivity. A lateral drift region of n-type conductivity is provided adjacent the body region, and a drain region of the p-type conductivity is provided laterally spaced from the body region by the drift region. An n-type conductivity drain region is formed of a shallow n-type contact surface region inserted into a p-inversion buffer. A gate electrode is provided over a part of the body region in which a channel region is formed during operation and extending over a part of the lateral drift region adjacent the body region, with the gate electrode being insulated from the body region and drift region by an insulation region.

Abstract: A scan/sustain driver for a plasma display panel. The driver integrates the scanning and sustain functions on one chip without external components for level shifting. The driver can perform both the scanning and sustaining of individual lines. External components are used for energy recovery. Control logic signals received from images can be internal or external.

Abstract: A circuit and method for controlling a switch include a level shifter that controls a dynamic, bi-directional high voltage analog switch. The level shifter generally includes transistors, input terminals, a voltage source, a high negative voltage source, and a diode. The configuration of the level shifter, inter alia, allows the switch to be kept ON without a current/signal, prevents dissipation of transistors of the level shifter, and provides constant gate-to-source voltage on the switch transistors for improved linearity.

Abstract: A circuit and method for controlling a switch is provided. Specifically, the circuit and method of the present invention provide a level shifter that controls a dynamic, bi-directional high voltage analog switch. The level shifter generally includes transistors, input terminals, a voltage source, a high negative voltage source, and a diode. The configuration of the level shifter, inter alia, allows the switch to be kept ON without a current/signal, prevents dissipation of transistors of the level shifter, and provides constant gate-to-source voltage on the switch transistors for improved linearity.