Abstract: Method and apparatus for bit synchronization in a receiver for digital data transmission in which the received short-length packets of bit pulses are first converted into normalized 1 or 0 samples at the rate nFb, where Fb is the bit rate and n a small even integer. For each packet or sub-packet of M bits, the following steps are performed:a) storing the normalized samples according to a sequence matrix [B] having (n+1) row-sequences B1, . . . , BA+1 and M columns;b) determining and storing a transition column matrix [T] having n rows obtained by adding modulo-2 pairs of adjacent sequences B1, . . . , Bn+1;c) calculating two barycentre numbers m1 and m2 for the upper and lower half of the matrix [T];d) calculating a barycentre number m of matrix [T] derived from numbers m1 and m2 and matrix [T] or matrix [T] robated cyclically by half the number of rows (n/2), depending on whether m2-m1 is smaller than n/2 or not.

Abstract: The method ensures the coherent demodulation by digitally processing a continuous-phase modulated signal (for instance, of the GMSK type). The received signal is transposed in the baseband, converted into a digital signal and transferred to a signal processor. Each transmitted data packet has a known preamble sequence of N bits which allows for approximate estimation of the frame-synchronization and the bit-synchronization and also the initial phase and the residual frequency offset. The progressive refinement of the estimation is obtained with two interleaved digital loops: a slow loop for detecting the bit-synchronization and a fast loop effecting intermediate decisions over additional blocks of bits for the estimation of the initial phase and the residual frequency offset.