Patents by Inventor Benoit HEROUX
Benoit HEROUX has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11460647Abstract: A chip packaging structure that includes an optoelectronic (OE) chip mounted on a first surface of a substrate and whose optically active area is directed laterally; and a lens array for the optoelectronic (OE) chip that is mounted on the first surface of the substrate and faces to the optoelectronic (OE) chip, wherein the lens array has inside a reflector reflecting light from a first direction to a second direction, in which the first direction is substantially perpendicular to the second direction.Type: GrantFiled: December 30, 2020Date of Patent: October 4, 2022Assignee: International Business Machines CorporationInventors: Jean Benoit Heroux, Masao Tokunari
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Patent number: 11436480Abstract: Provided is a reservoir computing system that is miniaturized and has a reduced learning cost. The reservoir computing system uses a reservoir that includes a first optical output section that outputs a first optical signal; a first optical waveguide that propagates the first optical signal output by the first optical output section; an optical receiving section that receives the first optical signal from the first optical waveguide; a storage section that stores received optical data corresponding to the first optical signal and output by the optical receiving section; and a feedback section that applies, to the first optical signal, feedback corresponding to the received optical data stored in the storage section.Type: GrantFiled: January 3, 2018Date of Patent: September 6, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Seiji Takeda, Daiju Nakano, Toshiyuki Yamane, Jean Benoit Heroux
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Patent number: 11281576Abstract: A memory device includes a non-volatile memory block, a protection unit arranged for connecting to a communication bus, and a sequencer arranged to receive commands from the protection unit. A logic circuit is arranged to output an enabling signal, and includes first and second logic subcircuits, and a combiner logic circuit.Type: GrantFiled: May 20, 2020Date of Patent: March 22, 2022Assignee: MELEXIS TECHNOLOGIES NVInventors: Nicolas Vielcanet, Philippe Laugier, Thomas Freitag, Benoit Heroux
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Publication number: 20210116652Abstract: A chip packaging structure that includes an optoelectronic (OE) chip mounted on a first surface of a substrate and whose optically active area is directed laterally; and a lens array for the optoelectronic (OE) chip that is mounted on the first surface of the substrate and faces to the optoelectronic (OE) chip, wherein the lens array has inside a reflector reflecting light from a first direction to a second direction, in which the first direction is substantially perpendicular to the second direction.Type: ApplicationFiled: December 30, 2020Publication date: April 22, 2021Inventors: Jean Benoit Heroux, Masao Tokunari
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Patent number: 10928586Abstract: A photonic neural component includes optical transmitters, optical receivers, inter-node waveguides formed on a board, transmitting waveguides configured to receive optical signals emitted from the optical transmitters and transmit the received optical signals to the inter-node waveguides, mirrors to partially reflect optical signals propagating on the inter-node waveguides, receiving waveguides configured to receive reflected optical signals produced by the mirrors and transmit the reflected optical signals to the optical receivers, and filters configured to apply weights to the reflected optical signals. The transmitting waveguides and receiving waveguides are formed on the board such that one of the transmitting waveguides and one of the receiving waveguides crosses one of the inter-node waveguides with a core of one of the crossing waveguides passing through a core or clad of the other.Type: GrantFiled: October 23, 2019Date of Patent: February 23, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jean Benoit Heroux, Seiji Takeda, Toshiyuki Yamane
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Patent number: 10914901Abstract: A chip packaging structure that includes an optoelectronic (OE) chip mounted on a first surface of a substrate and whose optically active area is directed laterally; and a lens array for the optoelectronic (OE) chip that is mounted on the first surface of the substrate and faces to the optoelectronic (OE) chip, wherein the lens array has inside a reflector reflecting light from a first direction to a second direction, in which the first direction is substantially perpendicular to the second direction.Type: GrantFiled: October 17, 2017Date of Patent: February 9, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jean Benoit Heroux, Masao Tokunari
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Publication number: 20200394132Abstract: A memory device includes a non-volatile memory block, a protection unit arranged for connecting to a communication bus, and a sequencer arranged to receive commands from the protection unit. A logic circuit is arranged to output an enabling signal, and includes first and second logic subcircuits, and a combiner logic circuit.Type: ApplicationFiled: May 20, 2020Publication date: December 17, 2020Inventors: Nicolas VIELCANET, Philippe LAUGIER, Thomas FREITAG, Benoit HEROUX
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Patent number: 10739518Abstract: Wavelength division multiplexing devices, and methods of forming the same, include a coupling lens and a waveguide, the lens being positioned over a mirror formed in a transmission path of the waveguide. The mirror reflects incoming light signals out of the transmission path through the lens and further reflects light signals coming from the lens and into the transmission path. An optical chip is positioned near a focal length of the lens. The optical chip has an optical filter configured to transmit a light signal at a first wavelength and to reflect received light signals at wavelengths other than the first wavelength.Type: GrantFiled: December 21, 2015Date of Patent: August 11, 2020Assignee: International Business Machines CorporationInventor: Jean Benoit Héroux
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Patent number: 10656352Abstract: A micro-mirror array for optical coupling in a waveguide array including, a transparent body having a slanted portion, a sidewall portion, and a bottom portion, the sidewall portion and the bottom portion each respectively facing the slanted portion, and wherein a complementary shape of a conventional form off-axis mirror is arranged on the slanted portion, and a reflective coating on at least a portion of the complementary shape.Type: GrantFiled: December 28, 2018Date of Patent: May 19, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jean Benoit Héroux, Masao Tokunari
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Patent number: 10598872Abstract: A micro-mirror array for optical coupling in a waveguide array including, a transparent body having a slanted portion, a sidewall portion, and a bottom portion, the sidewall portion and the bottom portion each respectively facing the slanted portion, and wherein a complementary shape of a conventional form off-axis mirror is arranged on the slanted portion, and a reflective coating on at least a portion of the complementary shape.Type: GrantFiled: December 28, 2018Date of Patent: March 24, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jean Benoit Héroux, Masao Tokunari
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Patent number: 10585240Abstract: A photonic neural component including optical transmitters, optical receivers, inter-node waveguides formed on a board, multiplexers configured to multiplex input optical signals onto the inter-node waveguides, transmitting waveguides configured to receive optical signals emitted from the optical transmitters and transmit the received optical signals to the inter-node waveguides via the multiplexers, mirrors to partially reflect optical signals propagating on the inter-node waveguides, receiving waveguides configured to receive reflected optical signals produced by the mirrors and transmit the reflected optical signals to the optical receivers, and filters configured to apply weights to the reflected optical signals. The transmitting waveguides and receiving waveguides are formed on the board such that one of the transmitting waveguides and one of the receiving waveguides crosses one of the inter-node waveguides with a core of one of the crossing waveguides passing through a core or clad of the other.Type: GrantFiled: August 20, 2019Date of Patent: March 10, 2020Assignee: International Business Machines CorporationInventors: Jean Benoit Heroux, Seiji Takeda, Toshiyuki Yamane
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Publication number: 20200057194Abstract: A photonic neural component includes optical transmitters, optical receivers, inter-node waveguides formed on a board, transmitting waveguides configured to receive optical signals emitted from the optical transmitters and transmit the received optical signals to the inter-node waveguides, mirrors to partially reflect optical signals propagating on the inter-node waveguides, receiving waveguides configured to receive reflected optical signals produced by the mirrors and transmit the reflected optical signals to the optical receivers, and filters configured to apply weights to the reflected optical signals. The transmitting waveguides and receiving waveguides are formed on the board such that one of the transmitting waveguides and one of the receiving waveguides crosses one of the inter-node waveguides with a core of one of the crossing waveguides passing through a core or clad of the other.Type: ApplicationFiled: October 23, 2019Publication date: February 20, 2020Inventors: Jean Benoit Heroux, Seiji Takeda, Toshiyuki Yamane
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Patent number: 10565076Abstract: A device for supervising ports of an integrated circuit is arranged for exchanging information with a central processing unit of an integrated circuit and for communicating with ports of the integrated circuit. The device comprises address decoding means, access control means, and parity controlling means. The device for supervising ports comprises read-back information means arranged for receiving input from the port and for passing that input to the parity control means and in that the address decoding means, the access control means, the read-back information means and the parity controlling means are arranged to be operative in a background loop wherein a range of port addresses is monitored. The read-back information means reads data and one or more parity bits stored on ports with an address in the range and the parity controlling means performs a parity check on the one or more parity bits stored on the ports.Type: GrantFiled: May 9, 2018Date of Patent: February 18, 2020Assignee: MELEXIS TECHNOLOGIES NVInventors: Benoit Heroux, Philippe Laugier, Thomas Freitag
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Patent number: 10514498Abstract: A photonic neural component includes optical transmitters, optical receivers, inter-node waveguides formed on a board, transmitting waveguides configured to receive optical signals emitted from the optical transmitters and transmit the received optical signals to the inter-node waveguides, mirrors to partially reflect optical signals propagating on the inter-node waveguides, receiving waveguides configured to receive reflected optical signals produced by the mirrors and transmit the reflected optical signals to the optical receivers, and filters configured to apply weights to the reflected optical signals. The transmitting waveguides and receiving waveguides are formed on the board such that one of the transmitting waveguides and one of the receiving waveguides crosses one of the inter-node waveguides with a core of one of the crossing waveguides passing through a core or clad of the other.Type: GrantFiled: April 10, 2019Date of Patent: December 24, 2019Assignee: International Business Machines CorporationInventors: Jean Benoit Heroux, Seiji Takeda, Toshiyuki Yamane
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Publication number: 20190369330Abstract: A photonic neural component including optical transmitters, optical receivers, inter-node waveguides formed on a board, multiplexers configured to multiplex input optical signals onto the inter-node waveguides, transmitting waveguides configured to receive optical signals emitted from the optical transmitters and transmit the received optical signals to the inter-node waveguides via the multiplexers, mirrors to partially reflect optical signals propagating on the inter-node waveguides, receiving waveguides configured to receive reflected optical signals produced by the mirrors and transmit the reflected optical signals to the optical receivers, and filters configured to apply weights to the reflected optical signals. The transmitting waveguides and receiving waveguides are formed on the board such that one of the transmitting waveguides and one of the receiving waveguides crosses one of the inter-node waveguides with a core of one of the crossing waveguides passing through a core or clad of the other.Type: ApplicationFiled: August 20, 2019Publication date: December 5, 2019Inventors: Jean Benoit Heroux, Seiji Takeda, Toshiyuki Yamane
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Patent number: 10467098Abstract: A method for performing an initialization or a reset of a port of an integrated circuit includes: receiving in a device for supervising ports, from a central processing unit of the integrated circuit, a port initialization signal comprising port initialization data and one or more parity bits; inverting in the device for supervising ports the one or more parity bits in accordance with the port initialization signal; providing the port initialization signal comprising the port initialization data and the inverted one or more parity bits to the port of the integrated circuit; on receipt of the port initialization signal at the port, inverting again in the port the inverted one or more parity bits, thereby obtaining the original one or more parity bits and storing the port initialization data and the just obtained original one or more parity bits.Type: GrantFiled: May 9, 2018Date of Patent: November 5, 2019Assignee: MELEXIS TECHNOLOGIES NVInventors: Philippe Laugier, Benoit Heroux, Thomas Freitag
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Patent number: 10451798Abstract: A photonic neural component including optical transmitters, optical receivers, inter-node waveguides formed on a board, multiplexers configured to multiplex input optical signals onto the inter-node waveguides, transmitting waveguides configured to receive optical signals emitted from the optical transmitters and transmit the received optical signals to the inter-node waveguides via the multiplexers, mirrors to partially reflect optical signals propagating on the inter-node waveguides, receiving waveguides configured to receive reflected optical signals produced by the mirrors and transmit the reflected optical signals to the optical receivers, and filters configured to apply weights to the reflected optical signals. The transmitting waveguides and receiving waveguides are formed on the board such that one of the transmitting waveguides and one of the receiving waveguides crosses one of the inter-node waveguides with a core of one of the crossing waveguides passing through a core or clad of the other.Type: GrantFiled: January 7, 2019Date of Patent: October 22, 2019Assignee: International Business Machines CorporationInventors: Jean Benoit Heroux, Seiji Takeda, Toshiyuki Yamane
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Publication number: 20190235165Abstract: A photonic neural component includes optical transmitters, optical receivers, inter-node waveguides formed on a board, transmitting waveguides configured to receive optical signals emitted from the optical transmitters and transmit the received optical signals to the inter-node waveguides, mirrors to partially reflect optical signals propagating on the inter-node waveguides, receiving waveguides configured to receive reflected optical signals produced by the mirrors and transmit the reflected optical signals to the optical receivers, and filters configured to apply weights to the reflected optical signals. The transmitting waveguides and receiving waveguides are formed on the board such that one of the transmitting waveguides and one of the receiving waveguides crosses one of the inter-node waveguides with a core of one of the crossing waveguides passing through a core or clad of the other.Type: ApplicationFiled: April 10, 2019Publication date: August 1, 2019Inventors: Jean Benoit Heroux, Seiji Takeda, Toshiyuki Yamane
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Patent number: 10365425Abstract: A method for fabricating an optical waveguide crossing structure. The method includes preparing a plate structure including a crossing part array and a guiding part array, each crossing part of the crossing part array being arranged at a gap from a plurality of guiding parts of the guiding part array. The method further includes preparing a waveguide structure including a first waveguide core array, a second waveguide core array and a tank, the tank being formed by removing a crossing region of the first waveguide core array and the second waveguide core array. The method further includes injecting an underfill into the tank. The method further includes depositing the plate structure on the waveguide structure so that the crossing part array and the guiding part array are inserted in the tank. The method further includes curing the underfill.Type: GrantFiled: July 11, 2018Date of Patent: July 30, 2019Assignee: International Business Machines CorporationInventors: Jean Benoit Héroux, Hsiang Han Hsu
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Patent number: 10365431Abstract: An optical interconnect structure and method are provided. The optical interconnect structure includes a plate on which a mirror is formed. The optical interconnect structure further includes a waveguide structure comprising a waveguide core and an opening. The plate is mounted on the waveguide structure such the mirror is inserted in the opening for light coupling (i) from the waveguide core and to an optical element positioned on the plate and (ii) to the waveguide core from the optical element positioned on the plate.Type: GrantFiled: October 18, 2016Date of Patent: July 30, 2019Assignee: International Business Machines CorporationInventors: Jean Benoit Héroux, Masao Tokunari