Abstract: A voltage converter includes a circuit formed by a parallel association, connected between first and second nodes, of a first branch and a second branch. The first branch includes a first controlled rectifying element having a first impedance. The second branch includes a resistor associated in series with a second rectifying element having a second impedance substantially equal to the first impedance. The second rectifying element may, for example, be a triac having its gate coupled to receive a signal from an intermediate node in the series association of the second branch. Alternatively, the second rectifying element may be a thyristor having its gate coupled to receive a signal at the anode of the thyristor.

Abstract: The present invention relates to a communication system comprising a plurality of processors and at least one switch, referred to as a main switch, connecting the processors into a main communication network; the system being characterised in that it further comprises at least one other switch, called an auxiliary switch, connecting the processors in an auxiliary communication network, and in that the auxiliary communication network is intended to be used by the processors to initialise the main communication network.

Abstract: The present invention relates to a communication system comprising a plurality of processors and at least one switch, referred to as a main switch, connecting the processors into a main communication network; the system being characterised in that it further comprises at least one other switch, called an auxiliary switch, connecting the processors in an auxiliary communication network, and in that the auxiliary communication network is intended to be used by the processors to initialise the main communication network.

Abstract: A voltage converter includes a circuit formed by a parallel association, connected between first and second nodes, of a first branch and a second branch. The first branch includes a first controlled rectifying element having a first impedance. The second branch includes a resistor associated in series with a second rectifying element having a second impedance substantially equal to the first impedance. The second rectifying element may, for example, be a triac having its gate coupled to receive a signal from an intermediate node in the series association of the second branch. Alternatively, the second rectifying element may be a thyristor having its gate coupled to receive a signal at the anode of the thyristor.

Abstract: A method for monitoring at least one software application able to be executed on a platform including resources that each software application is able to access during its execution, is implemented by an electronic monitoring device. It comprises: monitoring each access request sent by a non-critical software application in order to access a set of resource(s) shared between the non-critical software application and at least one critical software application; and putting the access request sent by the non-critical software application on hold if it is sent during a buffer time period preceding the execution of the next critical software application including a reserved section for the set of shared resource(s), the reserved section being a time period during which one of the at least one critical software application requests exclusive access to the set of shared resource(s).

Abstract: This method for monitoring at least one software application able to be on a platform including resources that each software application is able to access during its execution, is implemented by an electronic monitoring device. It comprises: monitoring each access request sent by a non-critical software application in order to access a set of resource(s) shared between said non-critical software application and at least one critical software application; and putting the access request sent by the non-critical software application on hold if it is sent during a buffer time period preceding the execution of the next critical software application including a section reserved for said set of shared resource(s), the reserved section being a time period during which one of the at least one critical software application requests exclusive access to said set of shared resource(s).

Abstract: A control circuit varies the power of a load powered by an alternating voltage, comprising: a first thyristor and a first diode connected in antiparallel between first and second nodes, the cathode of the first diode being on the side of the first node; a second thyristor and a second diode connected in antiparallel between the second node and a third node, the cathode of the second diode being on the side of the third node; third and fourth diodes connected in antiseries between the first and third nodes, the cathodes of the third and fourth diodes being connected to a fourth node; a transistor between the second and fourth nodes; and a control unit for controlling the first and second thyristors and the transistor.

Abstract: A control circuit varies the power of a load powered by an alternating voltage, comprising: a first thyristor and a first diode connected in antiparallel between first and second nodes, the cathode of the first diode being on the side of the first node; a second thyristor and a second diode connected in antiparallel between the second node and a third node, the cathode of the second diode being on the side of the third node; third and fourth diodes connected in antiseries between the first and third nodes, the cathodes of the third and fourth diodes being connected to a fourth node; a transistor between the second and fourth nodes; and a control unit for controlling the first and second thyristors and the transistor.

Abstract: A method for producing a standard OS image, intended for an operating system, including a compilation of at least one source file into at least one executable file. The method also including forming (form) an intermediate standard OS image (IM0) from the executable file(s), coding (cdg) the intermediate standard OS image so as to obtain a coded data sequence (BNC), and masking the coded data sequence (BNC) in a standard OS image (IM1).